Searched refs:pllctrl (Results 1 – 2 of 2) sorted by relevance
77 u32 val, tmdsck, idf, odf, pllctrl = 0; in sti_hdmi_tx3g4c28phy_start() local101 pllctrl |= 40 << PLL_CFG_NDIV_SHIFT; in sti_hdmi_tx3g4c28phy_start()108 pllctrl |= idf << PLL_CFG_IDF_SHIFT; in sti_hdmi_tx3g4c28phy_start()109 pllctrl |= odf << PLL_CFG_ODF_SHIFT; in sti_hdmi_tx3g4c28phy_start()115 DRM_DEBUG_DRIVER("pllctrl = 0x%x\n", pllctrl); in sti_hdmi_tx3g4c28phy_start()116 hdmi_write(hdmi, (pllctrl | PLL_CFG_EN), HDMI_SRZ_PLL_CFG); in sti_hdmi_tx3g4c28phy_start()
162 static void __init _of_pll_clk_init(struct device_node *node, bool pllctrl) in _of_pll_clk_init() argument201 pll_data->has_pllctrl = pllctrl; in _of_pll_clk_init()