| /drivers/gpu/drm/savage/ |
| D | savage_state.c | 283 unsigned int prim = cmd_header->prim.prim; in savage_dispatch_dma_prim() local
284 unsigned int skip = cmd_header->prim.skip; in savage_dispatch_dma_prim()
285 unsigned int n = cmd_header->prim.count; in savage_dispatch_dma_prim()
286 unsigned int start = cmd_header->prim.start; in savage_dispatch_dma_prim()
298 switch (prim) { in savage_dispatch_dma_prim()
301 prim = SAVAGE_PRIM_TRILIST; in savage_dispatch_dma_prim()
319 DRM_ERROR("invalid primitive type %u\n", prim); in savage_dispatch_dma_prim()
371 prim <<= 25; in savage_dispatch_dma_prim()
383 BCI_DRAW_INDICES_S3D(count, prim, start + 2); in savage_dispatch_dma_prim()
393 BCI_DRAW_INDICES_S3D(count, prim, start); in savage_dispatch_dma_prim()
[all …]
|
| /drivers/gpu/drm/mga/ |
| D | mga_drv.h | 80 drm_mga_primary_buffer_t prim; member
231 if (test_bit(0, &dev_priv->prim.wrapped)) { \
234 } else if (dev_priv->prim.space < \
235 dev_priv->prim.high_mark) { \
245 if (test_bit(0, &dev_priv->prim.wrapped)) { \
261 #define DMA_LOCALS unsigned int write; volatile u8 *prim;
270 dev_priv->prim.space, (n) * DMA_BLOCK_SIZE); \
272 prim = dev_priv->prim.start; \
273 write = dev_priv->prim.tail; \
280 DRM_INFO(" space=0x%x\n", dev_priv->prim.space); \
[all …]
|
| D | mga_dma.c | 78 drm_mga_primary_buffer_t *primary = &dev_priv->prim; in mga_do_dma_reset()
105 drm_mga_primary_buffer_t *primary = &dev_priv->prim; in mga_do_dma_flush()
160 drm_mga_primary_buffer_t *primary = &dev_priv->prim; in mga_do_dma_wrap_start()
200 drm_mga_primary_buffer_t *primary = &dev_priv->prim; in mga_do_dma_wrap_end()
900 dev_priv->prim.status = (u32 *) dev_priv->status->handle; in mga_do_init_dma()
908 …MGA_WRITE(MGA_PRIMPTR, virt_to_bus((void *)dev_priv->prim.status) | MGA_PRIMPTREN0 | /* Soft trap,… in mga_do_init_dma()
912 dev_priv->prim.start = (u8 *) dev_priv->primary->handle; in mga_do_init_dma()
913 dev_priv->prim.end = ((u8 *) dev_priv->primary->handle in mga_do_init_dma()
915 dev_priv->prim.size = dev_priv->primary->size; in mga_do_init_dma()
917 dev_priv->prim.tail = 0; in mga_do_init_dma()
[all …]
|
| D | mga_state.c | 581 sarea_priv->last_frame.head = dev_priv->prim.tail; in mga_dma_dispatch_swap()
582 sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap; in mga_dma_dispatch_swap()
|
| /drivers/powercap/ |
| D | intel_rapl.c | 242 enum rapl_primitives prim,
245 enum rapl_primitives prim,
497 int prim; in get_current_power_limit() local
511 prim = POWER_LIMIT1; in get_current_power_limit()
514 prim = POWER_LIMIT2; in get_current_power_limit()
520 if (rapl_read_data_raw(rd, prim, true, &val)) in get_current_power_limit()
616 int prim; in get_max_power() local
623 prim = THERMAL_SPEC_POWER; in get_max_power()
626 prim = MAX_POWER; in get_max_power()
632 if (rapl_read_data_raw(rd, prim, true, &val)) in get_max_power()
[all …]
|
| /drivers/gpu/drm/r128/ |
| D | r128_state.c | 572 int prim = buf_priv->prim; in r128_cce_dispatch_vertex() local
601 OUT_RING(prim | R128_CCE_VC_CNTL_PRIM_WALK_LIST | in r128_cce_dispatch_vertex()
697 int prim = buf_priv->prim; in r128_cce_dispatch_indices() local
724 data[4] = cpu_to_le32((prim | R128_CCE_VC_CNTL_PRIM_WALK_IND | in r128_cce_dispatch_indices()
1338 if (vertex->prim < 0 || in r128_cce_vertex()
1339 vertex->prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2) { in r128_cce_vertex()
1340 DRM_ERROR("buffer prim %d\n", vertex->prim); in r128_cce_vertex()
1361 buf_priv->prim = vertex->prim; in r128_cce_vertex()
1391 if (elts->prim < 0 || in r128_cce_indices()
1392 elts->prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2) { in r128_cce_indices()
[all …]
|
| D | r128_drv.h | 131 int prim; member
|
| /drivers/isdn/mISDN/ |
| D | dsp_core.c | 675 switch (hh->prim) { in dsp_function()
708 hh->prim = DL_DATA_IND; in dsp_function()
767 hh->prim = DL_DATA_IND; in dsp_function()
854 hh->prim = DL_ESTABLISH_CNF; in dsp_function()
870 hh->prim = DL_RELEASE_CNF; in dsp_function()
887 hh->prim = PH_DATA_REQ; in dsp_function()
918 hh->prim = PH_ACTIVATE_REQ; in dsp_function()
938 hh->prim = PH_DEACTIVATE_REQ; in dsp_function()
945 __func__, hh->prim, dsp->name); in dsp_function()
1028 if (hh->prim == DL_DATA_REQ) { in dsp_send_bh()
|
| D | layer2.c | 147 l2up(struct layer2 *l2, u_int prim, struct sk_buff *skb) in l2up() argument
153 mISDN_HEAD_PRIM(skb) = prim; in l2up()
164 l2up_create(struct layer2 *l2, u_int prim, int len, void *arg) in l2up_create() argument
176 hh->prim = prim; in l2up_create()
204 if (hh->prim == PH_DATA_REQ) { in l2down_raw()
215 l2down(struct layer2 *l2, u_int prim, u_int id, struct sk_buff *skb) in l2down() argument
219 hh->prim = prim; in l2down()
225 l2down_create(struct layer2 *l2, u_int prim, u_int id, int len, void *arg) in l2down_create() argument
235 hh->prim = prim; in l2down_create()
301 hh->prim = event == EV_L2_T200 ? DL_TIMER200_IND : DL_TIMER203_IND; in l2_timeout()
[all …]
|
| D | stack.c | 33 __func__, hh->prim, hh->id, skb); in _queue_message()
115 hh->prim, ch->addr, ret); in send_layer2()
139 __func__, hh->prim, ret); in send_layer2()
154 lm = hh->prim & MISDN_LAYERMASK; in send_msg_to_layer()
157 __func__, hh->prim, hh->id, skb); in send_msg_to_layer()
176 __func__, dev_name(&st->dev->dev), hh->prim, in send_msg_to_layer()
186 __func__, dev_name(&st->dev->dev), hh->prim, in send_msg_to_layer()
191 __func__, dev_name(&st->dev->dev), hh->prim); in send_msg_to_layer()
|
| D | hwchannel.c | 230 hh->prim = PH_DATA_IND; in recv_Dchannel()
249 hh->prim = PH_DATA_E_IND; in recv_Echannel()
276 hh->prim = PH_DATA_IND; in recv_Bchannel()
402 hh->prim = pr; in queue_ch_frame()
|
| D | tei.c | 302 teiup_create(struct manager *mgr, u_int prim, int len, void *arg) in teiup_create() argument
312 hh->prim = prim; in teiup_create()
1114 __func__, hh->prim, hh->id); in mgr_send()
1115 switch (hh->prim) { in mgr_send()
1215 __func__, hh->prim, hh->id); in check_data()
1218 if (hh->prim != PH_DATA_IND) in check_data()
1320 hhc->prim = DL_INTERN_MSG; in mgr_bcast()
1329 hh->prim, l2->ch.addr, ret); in mgr_bcast()
|
| D | dsp_cmx.c | 1362 hh->prim = PH_DATA_REQ;
1581 hh->prim = DL_DATA_REQ;
1596 thh->prim = DL_DATA_REQ;
1939 hh->prim = PH_DATA_REQ;
1955 hh->prim = PH_DATA_REQ;
|
| D | l1oip_core.c | 896 switch (hh->prim) { in handle_dmsg()
1111 switch (hh->prim) { in handle_bmsg()
|
| /drivers/scsi/libsas/ |
| D | sas_port.c | 274 u32 prim; in sas_porte_broadcast_rcvd() local
279 prim = phy->sas_prim; in sas_porte_broadcast_rcvd()
282 SAS_DPRINTK("broadcast received: %d\n", prim); in sas_porte_broadcast_rcvd()
|
| /drivers/gpu/drm/radeon/ |
| D | radeon_ioc32.c | 212 u32 prim; member
232 || __put_user((void __user *)(unsigned long)req32.prim, in compat_radeon_cp_vertex2()
233 &request->prim)) in compat_radeon_cp_vertex2()
|
| /drivers/staging/lustre/lnet/libcfs/ |
| D | Makefile | 4 libcfs-linux-objs += linux-prim.o linux-cpu.o
|
| /drivers/isdn/hardware/mISDN/ |
| D | w6692.c | 961 switch (hh->prim) { in w6692_l2l1B()
993 card->name, __func__, hh->prim, hh->id); in w6692_l2l1B()
1088 switch (hh->prim) { in w6692_l2l1D()
1102 ret = l1_event(dch->l1, hh->prim); in w6692_l2l1D()
1106 ret = l1_event(dch->l1, hh->prim); in w6692_l2l1D()
|
| D | mISDNipac.c | 579 switch (hh->prim) { in isac_l1hw()
593 ret = l1_event(dch->l1, hh->prim); in isac_l1hw()
597 ret = l1_event(dch->l1, hh->prim); in isac_l1hw()
1358 switch (hh->prim) { in hscx_l2l1()
1390 hx->ip->name, __func__, hh->prim, hh->id); in hscx_l2l1()
|
| D | hfcsusb.c | 221 switch (hh->prim) { in hfcusb_l2l1B()
294 switch (hh->prim) { in hfcusb_l2l1D()
329 ret = l1_event(dch->l1, hh->prim); in hfcusb_l2l1D()
360 ret = l1_event(dch->l1, hh->prim); in hfcusb_l2l1D()
|
| D | hfcpci.c | 1597 switch (hh->prim) { in hfcpci_l2l1D()
1627 ret = l1_event(dch->l1, hh->prim); in hfcpci_l2l1D()
1657 ret = l1_event(dch->l1, hh->prim); in hfcpci_l2l1D()
1679 switch (hh->prim) { in hfcpci_l2l1B()
|
| /drivers/net/bonding/ |
| D | bond_main.c | 718 struct slave *prim = rtnl_dereference(bond->primary_slave); in bond_choose_primary_or_current() local
721 if (!prim || prim->link != BOND_LINK_UP) { in bond_choose_primary_or_current()
729 return prim; in bond_choose_primary_or_current()
733 return prim; in bond_choose_primary_or_current()
738 return prim; in bond_choose_primary_or_current()
740 if (prim->speed < curr->speed) in bond_choose_primary_or_current()
742 if (prim->speed == curr->speed && prim->duplex <= curr->duplex) in bond_choose_primary_or_current()
744 return prim; in bond_choose_primary_or_current()
|
| /drivers/macintosh/ |
| D | via-pmu.c | 489 struct device_node* prim = in via_pmu_dev_init() local
492 if (prim) in via_pmu_dev_init()
493 prim_info = of_get_property(prim, "prim-info", NULL); in via_pmu_dev_init()
501 of_node_put(prim); in via_pmu_dev_init()
|
| /drivers/scsi/aic94xx/ |
| D | aic94xx_sas.h | 562 u8 prim[4]; /* K, D0, D1, D2 */ member
|
| /drivers/gpu/drm/i810/ |
| D | i810_dma.c | 733 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK); in i810_dma_dispatch_vertex() local
736 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2))); in i810_dma_dispatch_vertex()
|