| /drivers/gpu/drm/nouveau/nvkm/core/ |
| D | ramht.c | 26 nvkm_ramht_hash(struct nvkm_ramht *ramht, int chid, u32 handle) in nvkm_ramht_hash() argument
31 hash ^= (handle & ((1 << ramht->bits) - 1)); in nvkm_ramht_hash()
32 handle >>= ramht->bits; in nvkm_ramht_hash()
35 hash ^= chid << (ramht->bits - 4); in nvkm_ramht_hash()
40 nvkm_ramht_search(struct nvkm_ramht *ramht, int chid, u32 handle) in nvkm_ramht_search() argument
44 co = ho = nvkm_ramht_hash(ramht, chid, handle); in nvkm_ramht_search()
46 if (ramht->data[co].chid == chid) { in nvkm_ramht_search()
47 if (ramht->data[co].handle == handle) in nvkm_ramht_search()
48 return ramht->data[co].inst; in nvkm_ramht_search()
51 if (++co >= ramht->size) in nvkm_ramht_search()
[all …]
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| D | Kbuild | 14 nvkm-y += nvkm/core/ramht.o
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| /drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| D | nv17.c | 56 struct nvkm_ramht *ramht = imem->ramht; in nv17_fifo_init() local
64 ((ramht->bits - 9) << 16) | in nv17_fifo_init()
65 (ramht->gpuobj->addr >> 8)); in nv17_fifo_init()
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| D | nv40.c | 66 struct nvkm_ramht *ramht = imem->ramht; in nv40_fifo_init() local
75 ((ramht->bits - 9) << 16) | in nv40_fifo_init()
76 (ramht->gpuobj->addr >> 8)); in nv40_fifo_init()
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| D | channv50.c | 154 nvkm_ramht_remove(chan->ramht, cookie); in nv50_fifo_chan_object_dtor()
175 return nvkm_ramht_insert(chan->ramht, object, 0, 4, handle, context); in nv50_fifo_chan_object_ctor()
210 nvkm_ramht_del(&chan->ramht); in nv50_fifo_chan_dtor()
265 ret = nvkm_ramht_new(device, 0x8000, 16, chan->base.inst, &chan->ramht); in nv50_fifo_chan_ctor()
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| D | gpfifonv50.c | 80 nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | in nv50_fifo_gpfifo_new()
82 (chan->ramht->gpuobj->node->offset >> 4)); in nv50_fifo_gpfifo_new()
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| D | dmanv50.c | 79 nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | in nv50_fifo_dma_new()
81 (chan->ramht->gpuobj->node->offset >> 4)); in nv50_fifo_dma_new()
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| D | nv04.c | 302 struct nvkm_ramht *ramht = imem->ramht; in nv04_fifo_init() local
310 ((ramht->bits - 9) << 16) | in nv04_fifo_init()
311 (ramht->gpuobj->addr >> 8)); in nv04_fifo_init()
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| D | dmag84.c | 79 nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | in g84_fifo_dma_new()
81 (chan->ramht->gpuobj->node->offset >> 4)); in g84_fifo_dma_new()
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| D | gpfifog84.c | 80 nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | in g84_fifo_gpfifo_new()
82 (chan->ramht->gpuobj->node->offset >> 4)); in g84_fifo_gpfifo_new()
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| D | channv50.h | 15 struct nvkm_ramht *ramht; member
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| D | chang84.c | 201 return nvkm_ramht_insert(chan->ramht, object, 0, 4, handle, context); in g84_fifo_chan_object_ctor()
280 ret = nvkm_ramht_new(device, 0x8000, 16, chan->base.inst, &chan->ramht); in g84_fifo_chan_ctor()
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| D | dmanv04.c | 42 nvkm_ramht_remove(imem->ramht, cookie); in nv04_fifo_dma_object_dtor()
67 hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4, in nv04_fifo_dma_object_ctor()
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| D | dmanv40.c | 161 hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4, in nv40_fifo_dma_object_ctor()
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| /drivers/gpu/drm/nouveau/nvkm/subdev/instmem/ |
| D | nv04.c | 174 ret = nvkm_ramht_new(device, 0x08000, 0, NULL, &imem->base.ramht); in nv04_instmem_oneinit()
199 nvkm_ramht_del(&imem->base.ramht); in nv04_instmem_dtor()
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| D | nv40.c | 185 ret = nvkm_ramht_new(device, 0x08000, 0, NULL, &imem->base.ramht); in nv40_instmem_oneinit()
214 nvkm_ramht_del(&imem->base.ramht); in nv40_instmem_dtor()
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| /drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
| D | instmem.h | 15 struct nvkm_ramht *ramht; member
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| /drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| D | dmacnv50.c | 45 nvkm_ramht_remove(object->root->ramht, object->hash); in nv50_disp_dmac_child_del_()
181 return nvkm_ramht_insert(chan->base.root->ramht, object, in nv50_disp_dmac_bind()
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| D | rootnv50.h | 14 struct nvkm_ramht *ramht; member
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| D | dmacgf119.c | 34 return nvkm_ramht_insert(chan->base.root->ramht, object, in gf119_disp_dmac_bind()
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| D | rootnv50.c | 258 nvkm_ramht_del(&root->ramht); in nv50_disp_root_dtor_()
296 return nvkm_ramht_new(device, 0x1000, 0, root->instmem, &root->ramht); in nv50_disp_root_new_()
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