| /drivers/clk/meson/ |
| D | clk-pll.c | 94 const struct pll_rate_table *rate_table = pll->rate_table; in meson_clk_pll_round_rate() local
98 if (rate <= rate_table[i].rate) in meson_clk_pll_round_rate()
99 return rate_table[i].rate; in meson_clk_pll_round_rate()
103 return rate_table[0].rate; in meson_clk_pll_round_rate()
109 const struct pll_rate_table *rate_table = pll->rate_table; in meson_clk_get_pll_settings() local
113 if (rate == rate_table[i].rate) in meson_clk_get_pll_settings()
114 return &rate_table[i]; in meson_clk_get_pll_settings()
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| D | clkc.h | 73 const struct pll_rate_table *rate_table; member
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| D | gxbb.c | 343 .rate_table = sys_pll_rate_table,
371 .rate_table = gp0_pll_rate_table,
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| D | meson8b.c | 182 .rate_table = sys_pll_rate_table,
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| /drivers/clk/rockchip/ |
| D | clk-cpu.c | 65 struct rockchip_cpuclk_rate_table *rate_table; member
77 const struct rockchip_cpuclk_rate_table *rate_table = in rockchip_get_cpuclk_settings() local
78 cpuclk->rate_table; in rockchip_get_cpuclk_settings()
82 if (rate == rate_table[i].prate) in rockchip_get_cpuclk_settings()
83 return &rate_table[i]; in rockchip_get_cpuclk_settings()
312 cpuclk->rate_table = kmemdup(rates, in rockchip_clk_register_cpuclk()
315 if (!cpuclk->rate_table) { in rockchip_clk_register_cpuclk()
333 kfree(cpuclk->rate_table); in rockchip_clk_register_cpuclk()
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| D | clk-pll.c | 46 const struct rockchip_pll_rate_table *rate_table; member
60 const struct rockchip_pll_rate_table *rate_table = pll->rate_table; in rockchip_get_pll_settings() local
64 if (rate == rate_table[i].rate) in rockchip_get_pll_settings()
65 return &rate_table[i]; in rockchip_get_pll_settings()
75 const struct rockchip_pll_rate_table *rate_table = pll->rate_table; in rockchip_pll_round_rate() local
80 if (drate >= rate_table[i].rate) in rockchip_pll_round_rate()
81 return rate_table[i].rate; in rockchip_pll_round_rate()
85 return rate_table[i - 1].rate; in rockchip_pll_round_rate()
839 struct rockchip_pll_rate_table *rate_table, in rockchip_clk_register_pll() argument
900 if (rate_table) { in rockchip_clk_register_pll()
[all …]
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| D | clk.h | 213 struct rockchip_pll_rate_table *rate_table; member
232 .rate_table = _rtable, \
240 struct rockchip_pll_rate_table *rate_table,
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| D | clk-rk3188.c | 866 if (!pll->rate_table) in rk3188_clk_init()
869 rate = pll->rate_table; in rk3188_clk_init()
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| D | clk.c | 387 list->mode_shift, list->rate_table, in rockchip_clk_register_plls()
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| /drivers/clk/samsung/ |
| D | clk-pll.c | 28 const struct samsung_pll_rate_table *rate_table; member
36 const struct samsung_pll_rate_table *rate_table = pll->rate_table; in samsung_get_pll_settings() local
40 if (rate == rate_table[i].rate) in samsung_get_pll_settings()
41 return &rate_table[i]; in samsung_get_pll_settings()
51 const struct samsung_pll_rate_table *rate_table = pll->rate_table; in samsung_pll_round_rate() local
56 if (drate >= rate_table[i].rate) in samsung_pll_round_rate()
57 return rate_table[i].rate; in samsung_pll_round_rate()
61 return rate_table[i - 1].rate; in samsung_pll_round_rate()
1232 if (pll_clk->rate_table) { in _samsung_clk_register_pll()
1234 for (len = 0; pll_clk->rate_table[len].rate != 0; ) in _samsung_clk_register_pll()
[all …]
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| D | clk-s3c2410.c | 384 s3c2410_plls[mpll].rate_table = pll_s3c2410_12mhz_tbl; in s3c2410_common_clk_init()
385 s3c2410_plls[upll].rate_table = pll_s3c2410_12mhz_tbl; in s3c2410_common_clk_init()
398 s3c244x_common_plls[mpll].rate_table = in s3c2410_common_clk_init()
400 s3c244x_common_plls[upll].rate_table = in s3c2410_common_clk_init()
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| D | clk-exynos4.c | 1465 exynos4210_plls[apll].rate_table = in exynos4_clk_init()
1467 exynos4210_plls[epll].rate_table = in exynos4_clk_init()
1472 exynos4210_plls[vpll].rate_table = in exynos4_clk_init()
1479 exynos4x12_plls[apll].rate_table = in exynos4_clk_init()
1481 exynos4x12_plls[epll].rate_table = in exynos4_clk_init()
1483 exynos4x12_plls[vpll].rate_table = in exynos4_clk_init()
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| D | clk.h | 297 const struct samsung_pll_rate_table *rate_table; member
312 .rate_table = _rtable, \
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| D | clk-exynos5250.c | 816 exynos5250_plls[epll].rate_table = epll_24mhz_tbl; in exynos5250_clk_init()
817 exynos5250_plls[apll].rate_table = apll_24mhz_tbl; in exynos5250_clk_init()
821 exynos5250_plls[vpll].rate_table = vpll_24mhz_tbl; in exynos5250_clk_init()
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| D | clk-exynos5410.c | 274 exynos5410_plls[epll].rate_table = exynos5410_pll2550x_24mhz_tbl; in exynos5410_clk_init()
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| D | clk-exynos5420.c | 1401 exynos5x_plls[apll].rate_table = exynos5420_pll2550x_24mhz_tbl; in exynos5x_clk_init()
1402 exynos5x_plls[kpll].rate_table = exynos5420_pll2550x_24mhz_tbl; in exynos5x_clk_init()
1403 exynos5x_plls[bpll].rate_table = exynos5420_pll2550x_24mhz_tbl; in exynos5x_clk_init()
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| /drivers/hwmon/ |
| D | ads1015.c | 80 const unsigned int * const rate_table = data->id == ads1115 ? in ads1015_read_adc() local
91 conversion_time_ms = DIV_ROUND_UP(1000, rate_table[data_rate]); in ads1015_read_adc()
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| /drivers/net/wireless/mediatek/mt7601u/ |
| D | phy.c | 816 struct power_per_rate *rate_table; in mt7601u_tssi_params_get() local
829 rate_table = dev->ee->power_rate_table.cck; in mt7601u_tssi_params_get()
834 rate_table = dev->ee->power_rate_table.ofdm; in mt7601u_tssi_params_get()
840 rate_table = dev->ee->power_rate_table.ht; in mt7601u_tssi_params_get()
845 p.trgt_power += rate_table[tx_rate / 2].bw20; in mt7601u_tssi_params_get()
847 p.trgt_power += rate_table[tx_rate / 2].bw40; in mt7601u_tssi_params_get()
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| /drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
| D | phy_lcn.c | 2305 u32 rate_table[BRCMS_NUM_RATES_CCK + BRCMS_NUM_RATES_OFDM + in wlc_lcnphy_txpower_recalc_target() local
2311 for (i = 0, j = 0; i < ARRAY_SIZE(rate_table); i++, j++) { in wlc_lcnphy_txpower_recalc_target()
2316 rate_table[i] = (u32) ((s32) (-pi->tx_power_offset[j])); in wlc_lcnphy_txpower_recalc_target()
2321 tab.tbl_len = ARRAY_SIZE(rate_table); in wlc_lcnphy_txpower_recalc_target()
2322 tab.tbl_ptr = rate_table; in wlc_lcnphy_txpower_recalc_target()
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