Searched refs:refclk_hz (Results 1 – 3 of 3) sorted by relevance
565 u32 hsck = (pdata->refclk_hz / pdata->pll_prd) * pdata->pll_fbd; in tc358743_set_pll()605 BUG_ON(!(pdata->refclk_hz == 26000000 || in tc358743_set_ref_clk()606 pdata->refclk_hz == 27000000 || in tc358743_set_ref_clk()607 pdata->refclk_hz == 42000000)); in tc358743_set_ref_clk()609 sys_freq = pdata->refclk_hz / 10000; in tc358743_set_ref_clk()614 (pdata->refclk_hz == 42000000) ? in tc358743_set_ref_clk()617 fh_min = pdata->refclk_hz / 100000; in tc358743_set_ref_clk()625 lockdet_ref = pdata->refclk_hz / 100; in tc358743_set_ref_clk()631 (pdata->refclk_hz == 27000000) ? in tc358743_set_ref_clk()677 u32 bps_pr_lane = (pdata->refclk_hz / pdata->pll_prd) * pdata->pll_fbd; in tc358743_num_csi_lanes_needed()[all …]
43 .refclk_hz = 26000000,68 .refclk_hz = 26000000,94 .refclk_hz = 26000000,114 .refclk_hz = 40000000,133 .refclk_hz = 40000000,152 .refclk_hz = 0,663 if (ar->hw.refclk_hz != 0) { in ath6kl_configure_target()665 ar->hw.refclk_hz); in ath6kl_configure_target()1606 ar->hw.refclk_hz, ar->hw.uarttx_pin); in ath6kl_init_hw_params()
782 u32 refclk_hz; member