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Searched refs:reg_index (Results 1 – 24 of 24) sorted by relevance

/drivers/pinctrl/nomadik/
Dpinctrl-nomadik.h30 .reg_index = altc1_ri,\
35 .reg_index = altc2_ri,\
40 .reg_index = altc3_ri,\
45 .reg_index = altc4_ri,\
79 u8 reg_index:2; member
Dpinctrl-nomadik.c488 reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; in nmk_prcm_altcx_set_mode()
517 reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; in nmk_prcm_altcx_set_mode()
528 reg = gpiocr_regs[pin_desc->altcx[alt_index].reg_index]; in nmk_prcm_altcx_set_mode()
604 reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; in nmk_prcm_gpiocr_get_mode()
/drivers/gpu/drm/mgag200/
Dmgag200_cursor.c54 u8 reg_index; in mga_crtc_cursor_set() local
171 reg_index = 0x8 + i*0x4; in mga_crtc_cursor_set()
173 reg_index = 0x60 + i*0x3; in mga_crtc_cursor_set()
174 WREG_DAC(reg_index, colour_set[i] & 0xff); in mga_crtc_cursor_set()
175 WREG_DAC(reg_index+1, colour_set[i]>>8 & 0xff); in mga_crtc_cursor_set()
176 WREG_DAC(reg_index+2, colour_set[i]>>16 & 0xff); in mga_crtc_cursor_set()
/drivers/irqchip/
Dirq-mtk-sysirq.c34 u32 offset, reg_index, value; in mtk_sysirq_set_type() local
39 reg_index = hwirq >> 5; in mtk_sysirq_set_type()
42 value = readl_relaxed(chip_data->intpol_base + reg_index * 4); in mtk_sysirq_set_type()
52 writel(value, chip_data->intpol_base + reg_index * 4); in mtk_sysirq_set_type()
/drivers/media/tuners/
Dqm1d1c0042.c51 static int reg_index; variable
350 for (reg_index = 0; reg_index < QM1D1C0042_NUM_REG_ROWS; in qm1d1c0042_init()
351 reg_index++) { in qm1d1c0042_init()
352 if (val == reg_initval[reg_index][0x00]) in qm1d1c0042_init()
355 if (reg_index >= QM1D1C0042_NUM_REG_ROWS) in qm1d1c0042_init()
357 memcpy(state->regs, reg_initval[reg_index], QM1D1C0042_NUM_REGS); in qm1d1c0042_init()
/drivers/media/dvb-frontends/
Dstv0900_core.c896 reg_index, in stv0900_activate_s2_modcod() local
908 reg_index = MODCODLSTF - mod_code / 2; in stv0900_activate_s2_modcod()
930 stv0900_write_reg(intp, reg_index, in stv0900_activate_s2_modcod()
933 stv0900_write_reg(intp, reg_index, in stv0900_activate_s2_modcod()
938 for (reg_index = 0; reg_index < 7; reg_index++) in stv0900_activate_s2_modcod()
939 stv0900_write_reg(intp, MODCODLST0 + reg_index, 0xff); in stv0900_activate_s2_modcod()
943 for (reg_index = 0; reg_index < 8; reg_index++) in stv0900_activate_s2_modcod()
944 stv0900_write_reg(intp, MODCODLST7 + reg_index, 0xcc); in stv0900_activate_s2_modcod()
953 u32 reg_index; in stv0900_activate_s2_modcod_single() local
960 for (reg_index = 0; reg_index < 13; reg_index++) in stv0900_activate_s2_modcod_single()
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/drivers/infiniband/hw/nes/
Dnes.h345 static inline u32 nes_read_indexed(struct nes_device *nesdev, u32 reg_index) in nes_read_indexed() argument
353 writel(reg_index, addr); in nes_read_indexed()
376 static inline void nes_write_indexed(struct nes_device *nesdev, u32 reg_index, u32 val) in nes_write_indexed() argument
383 writel(reg_index, addr); in nes_write_indexed()
/drivers/gpu/drm/amd/amdgpu/
Dclearstate_defs.h35 const unsigned int reg_index; member
Dgfx_v6_0.c1692 amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v6_0_cp_gfx_start()
2716 buffer[count++] = cpu_to_le32(ext->reg_index - 0xa000); in gfx_v6_0_get_csb_buffer()
Dgfx_v7_0.c2503 amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_cp_gfx_start()
4211 buffer[count++] = cpu_to_le32(ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_get_csb_buffer()
Dgfx_v8_0.c1116 buffer[count++] = cpu_to_le32(ext->reg_index - in gfx_v8_0_get_csb_buffer()
4275 ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_cp_gfx_start()
/drivers/gpu/drm/radeon/
Dclearstate_defs.h35 const unsigned int reg_index; member
Dsumo_dpm.c477 u32 reg_index = index / 4; in sumo_set_divider_value() local
481 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
484 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
487 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
490 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
583 u32 reg_index = index / 4; in sumo_power_level_enable() local
587 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
590 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
593 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
596 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
Devergreen.c4396 data = (cs_data[i].section[j].reg_index * 4) & 0xffffffff; in sumo_rlc_init()
Dsi.c5730 buffer[count++] = cpu_to_le32(ext->reg_index - 0xa000); in si_get_csb_buffer()
Dcik.c6794 buffer[count++] = cpu_to_le32(ext->reg_index - 0xa000); in cik_get_csb_buffer()
/drivers/scsi/libsas/
Dsas_host_smp.c117 u8 reg_type, u8 reg_index, u8 reg_count, in sas_host_smp_write_gpio() argument
128 written = i->dft->lldd_write_gpio(sas_ha, reg_type, reg_index, in sas_host_smp_write_gpio()
/drivers/scsi/mvsas/
Dmv_sas.h177 u8 reg_index, u8 reg_count, u8 *write_data);
482 int mvs_gpio_write(struct sas_ha_struct *, u8 reg_type, u8 reg_index,
Dmv_94xx.c1057 u8 reg_type, u8 reg_index, in mvs_94xx_gpio_write() argument
1065 if (reg_index == 0) in mvs_94xx_gpio_write()
1127 if (reg_index + reg_count > mvs_prv->n_host) in mvs_94xx_gpio_write()
1131 struct mvs_info *mvi = mvs_prv->mvi[i+reg_index]; in mvs_94xx_gpio_write()
Dmv_sas.c2113 int mvs_gpio_write(struct sas_ha_struct *sha, u8 reg_type, u8 reg_index, in mvs_gpio_write() argument
2121 reg_index, reg_count, write_data); in mvs_gpio_write()
/drivers/power/supply/
Dbq27xxx_battery.c468 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index, in bq27xxx_read() argument
472 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) in bq27xxx_read()
475 return di->bus.read(di, di->regs[reg_index], single); in bq27xxx_read()
/drivers/scsi/isci/
Dhost.c2756 static int sci_write_gpio_tx_gp(struct isci_host *ihost, u8 reg_index, u8 reg_count, u8 *write_data) in sci_write_gpio_tx_gp() argument
2761 if (reg_index == 0) in sci_write_gpio_tx_gp()
2772 write_data, reg_index, in sci_write_gpio_tx_gp()
2792 int isci_gpio_write(struct sas_ha_struct *sas_ha, u8 reg_type, u8 reg_index, in isci_gpio_write() argument
2800 written = sci_write_gpio_tx_gp(ihost, reg_index, reg_count, write_data); in isci_gpio_write()
Dhost.h515 int isci_gpio_write(struct sas_ha_struct *, u8 reg_type, u8 reg_index,
/drivers/net/ethernet/intel/igb/
Digb_ethtool.c2752 u16 reg_index) in igb_clear_etype_filter_regs() argument
2755 u32 etqf = rd32(E1000_ETQF(reg_index)); in igb_clear_etype_filter_regs()
2761 wr32(E1000_ETQF(reg_index), etqf); in igb_clear_etype_filter_regs()
2763 adapter->etype_bitmap[reg_index] = false; in igb_clear_etype_filter_regs()