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Searched refs:reg_offs (Results 1 – 14 of 14) sorted by relevance

/drivers/gpio/
Dgpio-tz1090.c93 unsigned int reg_offs, u32 data) in tz1090_gpio_write() argument
95 iowrite32(data, bank->reg + reg_offs); in tz1090_gpio_write()
99 unsigned int reg_offs) in tz1090_gpio_read() argument
101 return ioread32(bank->reg + reg_offs); in tz1090_gpio_read()
106 unsigned int reg_offs, in _tz1090_gpio_clear_bit() argument
111 value = tz1090_gpio_read(bank, reg_offs); in _tz1090_gpio_clear_bit()
113 tz1090_gpio_write(bank, reg_offs, value); in _tz1090_gpio_clear_bit()
117 unsigned int reg_offs, in tz1090_gpio_clear_bit() argument
123 _tz1090_gpio_clear_bit(bank, reg_offs, offset); in tz1090_gpio_clear_bit()
129 unsigned int reg_offs, in _tz1090_gpio_set_bit() argument
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Dgpio-tz1090-pdc.c55 static inline void pdc_write(struct tz1090_pdc_gpio *priv, unsigned int reg_offs, in pdc_write() argument
58 writel(data, priv->reg + reg_offs); in pdc_write()
62 unsigned int reg_offs) in pdc_read() argument
64 return readl(priv->reg + reg_offs); in pdc_read()
/drivers/irqchip/
Dirq-sunxi-nmi.c131 struct sunxi_sc_nmi_reg_offs *reg_offs) in sunxi_sc_nmi_irq_init() argument
175 gc->chip_types[0].regs.ack = reg_offs->pend; in sunxi_sc_nmi_irq_init()
176 gc->chip_types[0].regs.mask = reg_offs->enable; in sunxi_sc_nmi_irq_init()
177 gc->chip_types[0].regs.type = reg_offs->ctrl; in sunxi_sc_nmi_irq_init()
185 gc->chip_types[1].regs.ack = reg_offs->pend; in sunxi_sc_nmi_irq_init()
186 gc->chip_types[1].regs.mask = reg_offs->enable; in sunxi_sc_nmi_irq_init()
187 gc->chip_types[1].regs.type = reg_offs->ctrl; in sunxi_sc_nmi_irq_init()
190 sunxi_sc_nmi_write(gc, reg_offs->enable, 0); in sunxi_sc_nmi_irq_init()
191 sunxi_sc_nmi_write(gc, reg_offs->pend, 0x1); in sunxi_sc_nmi_irq_init()
Dirq-imgpdc.c88 static void pdc_write(struct pdc_intc_priv *priv, unsigned int reg_offs, in pdc_write() argument
91 iowrite32(data, priv->pdc_base + reg_offs); in pdc_write()
95 unsigned int reg_offs) in pdc_read() argument
97 return ioread32(priv->pdc_base + reg_offs); in pdc_read()
/drivers/media/rc/img-ir/
Dimg-ir.h162 unsigned int reg_offs, unsigned int data) in img_ir_write() argument
164 iowrite32(data, priv->reg_base + reg_offs); in img_ir_write()
168 unsigned int reg_offs) in img_ir_read() argument
170 return ioread32(priv->reg_base + reg_offs); in img_ir_read()
/drivers/media/dvb-frontends/
Ddib7000m.c36 u8 reg_offs; member
136 if (state->reg_offs && (r >= 112 && r <= 331)) // compensate for 7000MC in dib7000m_write_tab()
155 smo_mode = (dib7000m_read_word(state, 294 + state->reg_offs) & 0x0010) | (1 << 1); in dib7000m_set_output_mode()
191 ret |= dib7000m_write_word(state, 294 + state->reg_offs, smo_mode); in dib7000m_set_output_mode()
192 ret |= dib7000m_write_word(state, 295 + state->reg_offs, fifo_threshold); /* synchronous fread */ in dib7000m_set_output_mode()
349 dib7000m_write_word(state, 263 + state->reg_offs, 6); in dib7000m_set_diversity_in()
350 dib7000m_write_word(state, 264 + state->reg_offs, 6); in dib7000m_set_diversity_in()
351 …dib7000m_write_word(state, 266 + state->reg_offs, (state->div_sync_wait << 4) | (1 << 2) | (2 << 0… in dib7000m_set_diversity_in()
353 dib7000m_write_word(state, 263 + state->reg_offs, 1); in dib7000m_set_diversity_in()
354 dib7000m_write_word(state, 264 + state->reg_offs, 0); in dib7000m_set_diversity_in()
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Ddib9000.c51 u8 reg_offs; member
972 state->reg_offs = 1; in dib9000_fw_reset()
/drivers/misc/genwqe/
Dcard_dev.c1059 u32 reg_offs; in genwqe_ioctl() local
1078 if (get_user(reg_offs, &io->num)) in genwqe_ioctl()
1081 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7)) in genwqe_ioctl()
1084 val = __genwqe_readq(cd, reg_offs); in genwqe_ioctl()
1098 if (get_user(reg_offs, &io->num)) in genwqe_ioctl()
1101 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7)) in genwqe_ioctl()
1107 __genwqe_writeq(cd, reg_offs, val); in genwqe_ioctl()
1114 if (get_user(reg_offs, &io->num)) in genwqe_ioctl()
1117 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3)) in genwqe_ioctl()
1120 val = __genwqe_readl(cd, reg_offs); in genwqe_ioctl()
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/drivers/soc/renesas/
Drcar-sysc.c66 unsigned int sr_bit, reg_offs; in rcar_sysc_pwr_on_off() local
71 reg_offs = PWRONCR_OFFS; in rcar_sysc_pwr_on_off()
74 reg_offs = PWROFFCR_OFFS; in rcar_sysc_pwr_on_off()
89 rcar_sysc_base + sysc_ch->chan_offs + reg_offs); in rcar_sysc_pwr_on_off()
/drivers/spi/
Dspi-sh-msiof.c183 static u32 sh_msiof_read(struct sh_msiof_spi_priv *p, int reg_offs) in sh_msiof_read() argument
185 switch (reg_offs) { in sh_msiof_read()
188 return ioread16(p->mapbase + reg_offs); in sh_msiof_read()
190 return ioread32(p->mapbase + reg_offs); in sh_msiof_read()
194 static void sh_msiof_write(struct sh_msiof_spi_priv *p, int reg_offs, in sh_msiof_write() argument
197 switch (reg_offs) { in sh_msiof_write()
200 iowrite16(value, p->mapbase + reg_offs); in sh_msiof_write()
203 iowrite32(value, p->mapbase + reg_offs); in sh_msiof_write()
/drivers/video/fbdev/
Dsh_mobile_lcdcfb.h60 unsigned long *reg_offs; member
Dsh_mobile_lcdcfb.c293 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]); in lcdc_write_chan()
295 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + in lcdc_write_chan()
302 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + in lcdc_write_chan_mirror()
309 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]); in lcdc_read_chan()
320 unsigned long reg_offs, unsigned long data) in lcdc_write() argument
322 iowrite32(data, priv->base + reg_offs); in lcdc_write()
326 unsigned long reg_offs) in lcdc_read() argument
328 return ioread32(priv->base + reg_offs); in lcdc_read()
332 unsigned long reg_offs, in lcdc_wait_bit() argument
335 while ((lcdc_read(priv, reg_offs) & mask) != until) in lcdc_wait_bit()
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/drivers/mtd/nand/brcmnand/
Dbrcmnand.c1094 u16 offset0, offset10, reg_offs; in oob_reg_read() local
1103 reg_offs = offset10 + ((offs - 0x10) & ~0x03); in oob_reg_read()
1105 reg_offs = offset0 + (offs & ~0x03); in oob_reg_read()
1107 return nand_readreg(ctrl, reg_offs) >> (24 - ((offs & 0x03) << 3)); in oob_reg_read()
1113 u16 offset0, offset10, reg_offs; in oob_reg_write() local
1122 reg_offs = offset10 + ((offs - 0x10) & ~0x03); in oob_reg_write()
1124 reg_offs = offset0 + (offs & ~0x03); in oob_reg_write()
1126 nand_writereg(ctrl, reg_offs, data); in oob_reg_write()
/drivers/media/platform/soc_camera/
Dsh_mobile_ceu_camera.c154 unsigned long reg_offs, u32 data) in ceu_write() argument
156 iowrite32(data, priv->base + reg_offs); in ceu_write()
159 static u32 ceu_read(struct sh_mobile_ceu_dev *priv, unsigned long reg_offs) in ceu_read() argument
161 return ioread32(priv->base + reg_offs); in ceu_read()