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Searched refs:reg_table (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atombios.c1636 struct atom_mc_reg_table *reg_table) in amdgpu_atombios_init_mc_reg_table() argument
1644 memset(reg_table, 0, sizeof(struct atom_mc_reg_table)); in amdgpu_atombios_init_mc_reg_table()
1673 reg_table->mc_reg_address[i].s1 = in amdgpu_atombios_init_mc_reg_table()
1675 reg_table->mc_reg_address[i].pre_reg_data = in amdgpu_atombios_init_mc_reg_table()
1681 reg_table->last = i; in amdgpu_atombios_init_mc_reg_table()
1687 reg_table->mc_reg_table_entry[num_ranges].mclk_max = in amdgpu_atombios_init_mc_reg_table()
1690 for (i = 0, j = 1; i < reg_table->last; i++) { in amdgpu_atombios_init_mc_reg_table()
1691 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in amdgpu_atombios_init_mc_reg_table()
1692 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in amdgpu_atombios_init_mc_reg_table()
1695 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in amdgpu_atombios_init_mc_reg_table()
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Damdgpu_atombios.h201 struct atom_mc_reg_table *reg_table);
/drivers/net/wireless/mediatek/mt7601u/
Dinitvals_phy.h272 static const struct reg_table { struct
Dphy.c299 const struct reg_table *t; in mt7601u_load_bbp_temp_table_bw()
311 const struct reg_table *t; in mt7601u_bbp_temp()
/drivers/gpu/drm/radeon/
Dradeon_atombios.c3974 struct atom_mc_reg_table *reg_table) in radeon_atom_init_mc_reg_table() argument
3982 memset(reg_table, 0, sizeof(struct atom_mc_reg_table)); in radeon_atom_init_mc_reg_table()
4011 reg_table->mc_reg_address[i].s1 = in radeon_atom_init_mc_reg_table()
4013 reg_table->mc_reg_address[i].pre_reg_data = in radeon_atom_init_mc_reg_table()
4019 reg_table->last = i; in radeon_atom_init_mc_reg_table()
4025 reg_table->mc_reg_table_entry[num_ranges].mclk_max = in radeon_atom_init_mc_reg_table()
4028 for (i = 0, j = 1; i < reg_table->last; i++) { in radeon_atom_init_mc_reg_table()
4029 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in radeon_atom_init_mc_reg_table()
4030 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in radeon_atom_init_mc_reg_table()
4033 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in radeon_atom_init_mc_reg_table()
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Dradeon.h341 struct atom_mc_reg_table *reg_table);
/drivers/gpu/drm/i915/
Di915_cmd_parser.c651 const struct drm_i915_reg_descriptor *reg_table, in check_sorted() argument
659 u32 curr = i915_mmio_reg_offset(reg_table[i].addr); in check_sorted()