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Searched refs:sad (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/radeon/
Ddce3_1_afmt.c93 struct cea_sad *sad = &sads[j]; in dce3_2_afmt_write_sad_regs() local
95 if (sad->format == eld_reg_to_type[i][1]) { in dce3_2_afmt_write_sad_regs()
96 if (sad->channels > max_channels) { in dce3_2_afmt_write_sad_regs()
97 value = MAX_CHANNELS(sad->channels) | in dce3_2_afmt_write_sad_regs()
98 DESCRIPTOR_BYTE_2(sad->byte2) | in dce3_2_afmt_write_sad_regs()
99 SUPPORTED_FREQUENCIES(sad->freq); in dce3_2_afmt_write_sad_regs()
100 max_channels = sad->channels; in dce3_2_afmt_write_sad_regs()
103 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in dce3_2_afmt_write_sad_regs()
104 stereo_freqs |= sad->freq; in dce3_2_afmt_write_sad_regs()
Ddce6_afmt.c234 struct cea_sad *sad = &sads[j]; in dce6_afmt_write_sad_regs() local
236 if (sad->format == eld_reg_to_type[i][1]) { in dce6_afmt_write_sad_regs()
237 if (sad->channels > max_channels) { in dce6_afmt_write_sad_regs()
238 value = MAX_CHANNELS(sad->channels) | in dce6_afmt_write_sad_regs()
239 DESCRIPTOR_BYTE_2(sad->byte2) | in dce6_afmt_write_sad_regs()
240 SUPPORTED_FREQUENCIES(sad->freq); in dce6_afmt_write_sad_regs()
241 max_channels = sad->channels; in dce6_afmt_write_sad_regs()
244 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in dce6_afmt_write_sad_regs()
245 stereo_freqs |= sad->freq; in dce6_afmt_write_sad_regs()
Devergreen_hdmi.c182 struct cea_sad *sad = &sads[j]; in evergreen_hdmi_write_sad_regs() local
184 if (sad->format == eld_reg_to_type[i][1]) { in evergreen_hdmi_write_sad_regs()
185 if (sad->channels > max_channels) { in evergreen_hdmi_write_sad_regs()
186 value = MAX_CHANNELS(sad->channels) | in evergreen_hdmi_write_sad_regs()
187 DESCRIPTOR_BYTE_2(sad->byte2) | in evergreen_hdmi_write_sad_regs()
188 SUPPORTED_FREQUENCIES(sad->freq); in evergreen_hdmi_write_sad_regs()
189 max_channels = sad->channels; in evergreen_hdmi_write_sad_regs()
192 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in evergreen_hdmi_write_sad_regs()
193 stereo_freqs |= sad->freq; in evergreen_hdmi_write_sad_regs()
/drivers/edac/
Dskx_edac.c508 #define SKX_SAD_MOD3MODE(sad) GET_BITFIELD((sad), 30, 31) argument
509 #define SKX_SAD_MOD3(sad) GET_BITFIELD((sad), 27, 27) argument
510 #define SKX_SAD_LIMIT(sad) (((u64)GET_BITFIELD((sad), 7, 26) << 26) | MASK26) argument
511 #define SKX_SAD_MOD3ASMOD2(sad) GET_BITFIELD((sad), 5, 6) argument
512 #define SKX_SAD_ATTR(sad) GET_BITFIELD((sad), 3, 4) argument
513 #define SKX_SAD_INTERLEAVE(sad) GET_BITFIELD((sad), 1, 2) argument
514 #define SKX_SAD_ENABLE(sad) GET_BITFIELD((sad), 0, 0) argument
524 u32 sad, ilv; in skx_sad_decode() local
537 SKX_GET_SAD(d, i, sad); in skx_sad_decode()
538 limit = SKX_SAD_LIMIT(sad); in skx_sad_decode()
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/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c1568 struct cea_sad *sad = &sads[j]; in dce_v8_0_audio_write_sad_regs() local
1570 if (sad->format == eld_reg_to_type[i][1]) { in dce_v8_0_audio_write_sad_regs()
1571 if (sad->channels > max_channels) { in dce_v8_0_audio_write_sad_regs()
1572 value = (sad->channels << in dce_v8_0_audio_write_sad_regs()
1574 (sad->byte2 << in dce_v8_0_audio_write_sad_regs()
1576 (sad->freq << in dce_v8_0_audio_write_sad_regs()
1578 max_channels = sad->channels; in dce_v8_0_audio_write_sad_regs()
1581 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in dce_v8_0_audio_write_sad_regs()
1582 stereo_freqs |= sad->freq; in dce_v8_0_audio_write_sad_regs()
Ddce_v11_0.c1596 struct cea_sad *sad = &sads[j]; in dce_v11_0_audio_write_sad_regs() local
1598 if (sad->format == eld_reg_to_type[i][1]) { in dce_v11_0_audio_write_sad_regs()
1599 if (sad->channels > max_channels) { in dce_v11_0_audio_write_sad_regs()
1601 MAX_CHANNELS, sad->channels); in dce_v11_0_audio_write_sad_regs()
1603 DESCRIPTOR_BYTE_2, sad->byte2); in dce_v11_0_audio_write_sad_regs()
1605 SUPPORTED_FREQUENCIES, sad->freq); in dce_v11_0_audio_write_sad_regs()
1606 max_channels = sad->channels; in dce_v11_0_audio_write_sad_regs()
1609 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in dce_v11_0_audio_write_sad_regs()
1610 stereo_freqs |= sad->freq; in dce_v11_0_audio_write_sad_regs()
Ddce_v10_0.c1629 struct cea_sad *sad = &sads[j]; in dce_v10_0_audio_write_sad_regs() local
1631 if (sad->format == eld_reg_to_type[i][1]) { in dce_v10_0_audio_write_sad_regs()
1632 if (sad->channels > max_channels) { in dce_v10_0_audio_write_sad_regs()
1634 MAX_CHANNELS, sad->channels); in dce_v10_0_audio_write_sad_regs()
1636 DESCRIPTOR_BYTE_2, sad->byte2); in dce_v10_0_audio_write_sad_regs()
1638 SUPPORTED_FREQUENCIES, sad->freq); in dce_v10_0_audio_write_sad_regs()
1639 max_channels = sad->channels; in dce_v10_0_audio_write_sad_regs()
1642 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM) in dce_v10_0_audio_write_sad_regs()
1643 stereo_freqs |= sad->freq; in dce_v10_0_audio_write_sad_regs()
/drivers/gpu/drm/
Ddrm_edid.c3487 u8 *sad = &db[1 + j * 3]; in drm_edid_to_sad() local
3489 (*sads)[j].format = (sad[0] & 0x78) >> 3; in drm_edid_to_sad()
3490 (*sads)[j].channels = sad[0] & 0x7; in drm_edid_to_sad()
3491 (*sads)[j].freq = sad[1] & 0x7F; in drm_edid_to_sad()
3492 (*sads)[j].byte2 = sad[2]; in drm_edid_to_sad()