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Searched refs:size_log2 (Results 1 – 6 of 6) sorted by relevance

/drivers/infiniband/hw/cxgb3/
Dcxio_wr.h47 #define Q_FULL(rptr,wptr,size_log2) ( (((wptr)-(rptr))>>(size_log2)) && \ argument
49 #define Q_GENBIT(ptr,size_log2) (!(((ptr)>>size_log2)&0x1)) argument
50 #define Q_FREECNT(rptr,wptr,size_log2) ((1UL<<size_log2)-((wptr)-(rptr))) argument
52 #define Q_PTR2IDX(ptr,size_log2) (ptr & ((1UL<<size_log2)-1)) argument
698 u32 size_log2; /* total wq size */ member
719 u32 size_log2; member
728 #define CQ_VLD_ENTRY(ptr,size_log2,cqe) (Q_GENBIT(ptr,size_log2) == \ argument
738 &cq->queue[1 << cq->size_log2])->cq_err; in cxio_cq_in_error()
744 &cq->queue[1 << cq->size_log2])->cq_err = 1; in cxio_set_cq_in_error()
771 cqe = cq->queue + (Q_PTR2IDX(cq->rptr, cq->size_log2)); in cxio_next_hw_cqe()
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Dcxio_hal.c92 if (Q_PTR2IDX((cq->rptr), cq->size_log2) != ret) { in cxio_hal_cq_op()
101 while (Q_PTR2IDX((rptr+1), cq->size_log2) != ret) in cxio_hal_cq_op()
109 cqe = cq->queue + Q_PTR2IDX(rptr, cq->size_log2); in cxio_hal_cq_op()
110 while (!CQ_VLD_ENTRY(rptr, cq->size_log2, cqe)) { in cxio_hal_cq_op()
161 int size = (1UL << (cq->size_log2)) * sizeof(struct t3_cqe); in cxio_create_cq()
182 setup.size = 1UL << cq->size_log2; in cxio_create_cq()
198 setup.size = 1UL << cq->size_log2; in cxio_resize_cq()
277 int depth = 1UL << wq->size_log2; in cxio_create_qp()
329 (1UL << (cq->size_log2)) in cxio_destroy_cq()
340 (1UL << (wq->size_log2)) in cxio_destroy_qp()
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Diwch_provider.c193 chp->cq.size_log2 = ilog2(entries); in iwch_create_cq()
200 chp->ibcq.cqe = 1 << chp->cq.size_log2; in iwch_create_cq()
220 uresp.size_log2 = chp->cq.size_log2; in iwch_create_cq()
231 mm->len = PAGE_ALIGN((1UL << uresp.size_log2) * in iwch_create_cq()
235 mm->len = PAGE_ALIGN(((1UL << uresp.size_log2) + 1) * in iwch_create_cq()
249 chp->cq.cqid, chp, (1 << chp->cq.size_log2), in iwch_create_cq()
269 newcq.size_log2 = ilog2(cqe); in iwch_resize_cq()
288 memcpy(newcq.queue, chp->cq.queue, (1 << chp->cq.size_log2) * in iwch_resize_cq()
302 chp->ibcq.cqe = (1<<chp->cq.size_log2) - 1; in iwch_resize_cq()
885 qhp->wq.size_log2 = ilog2(wqsize); in iwch_create_qp()
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Diwch_qp.c176 Q_PTR2IDX((wq->wptr+1), wq->size_log2)); in build_memreg()
178 Q_GENBIT(wq->wptr + 1, wq->size_log2), in build_memreg()
385 idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2); in iwch_post_send()
444 Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), in iwch_post_send()
495 idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2); in iwch_post_receive()
509 Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), in iwch_post_receive()
844 init_attr.qp_dma_size = (1UL << qhp->wq.size_log2); in rdma_init()
/drivers/net/wireless/ath/ath10k/
Dswap.h51 __le32 size_log2; member
Dswap.c130 seg_info->seg_hw_info.size_log2 = __cpu_to_le32(ilog2(swap_bin_len)); in ath10k_swap_code_seg_alloc()