Home
last modified time | relevance | path

Searched refs:tp_intr (Results 1 – 1 of 1) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb/
Dtp.c72 u32 tp_intr = readl(tp->adapter->regs + A_PL_ENABLE); in t1_tp_intr_enable() local
79 writel(tp_intr | FPGA_PCIX_INTERRUPT_TP, in t1_tp_intr_enable()
86 writel(tp_intr | F_PL_INTR_TP, in t1_tp_intr_enable()
93 u32 tp_intr = readl(tp->adapter->regs + A_PL_ENABLE); in t1_tp_intr_disable() local
99 writel(tp_intr & ~FPGA_PCIX_INTERRUPT_TP, in t1_tp_intr_disable()
105 writel(tp_intr & ~F_PL_INTR_TP, in t1_tp_intr_disable()