| /drivers/spi/ |
| D | spi-cavium.h | 41 uint64_t u64;
44 uint64_t reserved_29_63:35;
45 uint64_t clkdiv:13;
46 uint64_t csena3:1;
47 uint64_t csena2:1;
48 uint64_t csena1:1;
49 uint64_t csena0:1;
50 uint64_t cslate:1;
51 uint64_t tritx:1;
52 uint64_t idleclks:2;
[all …]
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| /drivers/dma/ioat/ |
| D | hw.h | 101 uint64_t src_addr;
102 uint64_t dst_addr;
103 uint64_t next;
104 uint64_t rsv1;
105 uint64_t rsv2;
108 uint64_t user1;
109 uint64_t tx_cnt;
111 uint64_t user2;
134 uint64_t src_addr;
135 uint64_t dst_addr;
[all …]
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| /drivers/char/ |
| D | mbcs.h | 66 #define MBCS_MMR_ADDR(mmr_base, offset)((uint64_t *)(mmr_base + offset))
68 uint64_t *mbcs_mmr_set_u64p, readback; \
69 mbcs_mmr_set_u64p = (uint64_t *)(mmr_base + offset); \
73 #define MBCS_MMR_GET(mmr_base, offset) *(uint64_t *)(mmr_base + offset)
80 uint64_t cm_id_reg;
82 uint64_t always_one:1, // 0
91 uint64_t cm_status_reg;
93 uint64_t pending_reads:8, // 7:0
115 uint64_t cm_error_detail1_reg;
117 uint64_t packet_type:4, // 3:0
[all …]
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| D | mbcs.c | 83 uint64_t hostAddr, in mbcs_getdma_set()
84 uint64_t localAddr, in mbcs_getdma_set()
85 uint64_t localRamSel, in mbcs_getdma_set()
86 uint64_t numPkts, in mbcs_getdma_set()
87 uint64_t amoEnable, in mbcs_getdma_set()
88 uint64_t intrEnable, in mbcs_getdma_set()
89 uint64_t peerIO, in mbcs_getdma_set()
90 uint64_t amoHostDest, in mbcs_getdma_set()
91 uint64_t amoModType, uint64_t intrHostDest, in mbcs_getdma_set()
92 uint64_t intrVector) in mbcs_getdma_set()
[all …]
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| /drivers/scsi/qla4xxx/ |
| D | ql4_fw.h | 1171 uint64_t reserved2; /* 18-1F */
1172 uint64_t reserved3; /* 20-27 */
1173 uint64_t reserved4; /* 28-2F */
1174 uint64_t reserved5; /* 30-37 */
1175 uint64_t reserved6; /* 38-3F */
1293 uint64_t mac_tx_frames; /* 0000–0007 */
1294 uint64_t mac_tx_bytes; /* 0008–000F */
1295 uint64_t mac_tx_multicast_frames; /* 0010–0017 */
1296 uint64_t mac_tx_broadcast_frames; /* 0018–001F */
1297 uint64_t mac_tx_pause_frames; /* 0020–0027 */
[all …]
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| /drivers/md/persistent-data/ |
| D | dm-btree.h | 110 uint64_t *keys, void *value_le);
117 uint64_t *keys, uint64_t *rkey, void *value_le);
123 uint64_t *keys, void *value, dm_block_t *new_root)
132 uint64_t *keys, void *value, dm_block_t *new_root,
142 uint64_t *keys, dm_block_t *new_root);
151 uint64_t *keys, uint64_t end_key,
160 uint64_t *result_keys);
168 uint64_t *result_keys);
176 int (*fn)(void *context, uint64_t *keys, void *leaf),
212 int dm_btree_cursor_get_value(struct dm_btree_cursor *c, uint64_t *key, void *value_le);
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| D | dm-btree.c | 41 static int bsearch(struct btree_node *n, uint64_t key, int want_hi) in bsearch()
47 uint64_t mid_key = le64_to_cpu(n->keys[mid]); in bsearch()
61 int lower_bound(struct btree_node *n, uint64_t key) in lower_bound()
66 static int upper_bound(struct btree_node *n, uint64_t key) in upper_bound()
86 uint64_t key, void *value) in insert_at()
117 size_t elt_size = sizeof(uint64_t) + value_size; /* key + value */ in calc_max_entries()
339 static int btree_lookup_raw(struct ro_spine *s, dm_block_t block, uint64_t key, in btree_lookup_raw()
340 int (*search_fn)(struct btree_node *, uint64_t), in btree_lookup_raw() argument
341 uint64_t *result_key, void *v, size_t value_size) in btree_lookup_raw()
370 uint64_t *keys, void *value_le) in dm_btree_lookup()
[all …]
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| /drivers/staging/goldfish/ |
| D | goldfish_sync_timeline.c | 117 uint64_t handle;
118 uint64_t hostcmd_handle;
124 uint64_t host_command; /* uint64_t for alignment */
125 uint64_t glsync_handle;
126 uint64_t thread_handle;
127 uint64_t guest_timeline_handle;
237 static uint64_t gensym_ctr;
368 uint64_t handle, in goldfish_sync_cmd_queue()
370 uint64_t hostcmd_handle) in goldfish_sync_cmd_queue()
391 uint64_t handle, in goldfish_sync_hostcmd_reply()
[all …]
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| /drivers/gpu/drm/radeon/ |
| D | radeon_asic.h | 70 uint64_t r100_pci_gart_get_page_entry(uint64_t addr, uint32_t flags);
72 uint64_t entry);
86 uint64_t src_offset,
87 uint64_t dst_offset,
157 uint64_t src_offset,
158 uint64_t dst_offset,
176 extern uint64_t rv370_pcie_gart_get_page_entry(uint64_t addr, uint32_t flags);
178 uint64_t entry);
213 uint64_t rs400_gart_get_page_entry(uint64_t addr, uint32_t flags);
215 uint64_t entry);
[all …]
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| D | radeon_vm.c | 240 uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory); in radeon_vm_flush()
361 uint64_t pe, in radeon_vm_set_pages()
362 uint64_t addr, unsigned count, in radeon_vm_set_pages()
368 uint64_t src = rdev->gart.table_addr + (addr >> 12) * 8; in radeon_vm_set_pages()
392 uint64_t addr; in radeon_vm_clear_bo()
447 uint64_t soffset, in radeon_vm_bo_set_addr()
450 uint64_t size = radeon_bo_size(bo_va->bo); in radeon_vm_bo_set_addr()
453 uint64_t eoffset; in radeon_vm_bo_set_addr()
594 uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr) in radeon_vm_map_gart()
596 uint64_t result; in radeon_vm_map_gart()
[all …]
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| D | si_dma.c | 71 uint64_t pe, uint64_t src, in si_dma_vm_copy_pages()
107 uint64_t pe, in si_dma_vm_write_pages()
108 uint64_t addr, unsigned count, in si_dma_vm_write_pages()
111 uint64_t value; in si_dma_vm_write_pages()
154 uint64_t pe, in si_dma_vm_set_pages()
155 uint64_t addr, unsigned count, in si_dma_vm_set_pages()
158 uint64_t value; in si_dma_vm_set_pages()
188 unsigned vm_id, uint64_t pd_addr) in si_dma_vm_flush()
232 uint64_t src_offset, uint64_t dst_offset, in si_copy_dma()
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| /drivers/gpu/drm/amd/amdkfd/ |
| D | kfd_priv.h | 140 uint64_t gpu_addr;
175 uint64_t gtt_start_gpu_addr;
318 uint64_t queue_address;
319 uint64_t queue_size;
335 uint64_t eop_ring_buffer_address;
337 uint64_t ctx_save_restore_area_address;
374 uint64_t gart_mqd_addr;
401 uint64_t queue_mask;
402 uint64_t gws_mask;
430 uint64_t gds_context_area;
[all …]
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| D | kfd_mqd_manager_cik.c | 38 struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr, in init_mqd()
41 uint64_t addr; in init_mqd()
110 struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr, in init_mqd_sdma()
185 m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8); in update_mqd()
186 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); in update_mqd()
187 m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr); in update_mqd()
188 m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); in update_mqd()
226 m->sdma_rlc_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr); in update_mqd_sdma()
227 m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr); in update_mqd_sdma()
272 uint64_t queue_address, uint32_t pipe_id, in is_occupied()
[all …]
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| D | kfd_flat_memory.c | 279 (((uint64_t)(gpu_num) << 61) + 0x1000000000000L)
282 (((uint64_t)(base) & \
286 (((uint64_t)(gpu_num) << 61) + 0x100000000L)
289 (((uint64_t)base & 0xFFFFFFFF00000000UL) | 0xFFFFFFFF)
292 (((uint64_t)(gpu_num) << 61) + 0x0)
294 (((uint64_t)(base) & 0xFFFFFFFF00000000UL) | 0xFFFFFFFF)
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| D | kfd_kernel_queue.h | 80 uint64_t rptr_gpu_addr;
83 uint64_t wptr_gpu_addr;
85 uint64_t pq_gpu_addr;
88 uint64_t eop_gpu_addr;
92 uint64_t fence_gpu_addr;
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| /drivers/gpu/drm/ttm/ |
| D | ttm_memory.c | 46 uint64_t zone_mem;
47 uint64_t emer_mem;
48 uint64_t max_mem;
49 uint64_t swap_limit;
50 uint64_t used_mem;
90 uint64_t val = 0; in ttm_mem_zone_show()
120 uint64_t val64; in ttm_mem_zone_store()
182 bool from_wq, uint64_t extra) in ttm_zones_above_swap_target()
186 uint64_t target; in ttm_zones_above_swap_target()
214 uint64_t extra) in ttm_shrink()
[all …]
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| /drivers/gpu/drm/i915/ |
| D | i915_gem_gtt.h | 50 typedef uint64_t gen8_pte_t;
51 typedef uint64_t gen8_pde_t;
52 typedef uint64_t gen8_ppgtt_pdpe_t;
53 typedef uint64_t gen8_ppgtt_pml4e_t;
139 #define GEN8_PPAT(i, x) ((uint64_t) (x) << ((i) * 8))
402 uint64_t start,
403 uint64_t length);
405 uint64_t start,
406 uint64_t length,
410 uint64_t offset,
[all …]
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| /drivers/crypto/qat/qat_common/ |
| D | icp_qat_fw_init_admin.h | 74 uint64_t opaque_data;
75 uint64_t init_cfg_ptr;
76 uint64_t resrvd3;
94 uint64_t resrvd2;
97 uint64_t req_rec_count;
98 uint64_t resp_sent_count;
112 uint64_t opaque_data;
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| /drivers/scsi/lpfc/ |
| D | lpfc_sli.h | 164 uint64_t iocb_event; /* IOCB event counters */
165 uint64_t iocb_cmd; /* IOCB cmd issued */
166 uint64_t iocb_rsp; /* IOCB rsp received */
167 uint64_t iocb_cmd_delay; /* IOCB cmd ring delay */
168 uint64_t iocb_cmd_full; /* IOCB cmd ring full */
169 uint64_t iocb_cmd_empty; /* IOCB cmd ring is now empty */
170 uint64_t iocb_rsp_full; /* IOCB rsp ring full */
265 uint64_t mbox_stat_err; /* Mbox cmds completed status error */
266 uint64_t mbox_cmd; /* Mailbox commands issued */
267 uint64_t sli_intr; /* Count of Host Attention interrupts */
[all …]
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_vm.c | 61 uint64_t src;
65 void (*func)(struct amdgpu_pte_update_params *params, uint64_t pe,
66 uint64_t addr, unsigned count, uint32_t incr,
131 uint64_t num_evictions; in amdgpu_vm_get_pt_bos()
201 uint64_t fence_context = adev->fence_context + ring->idx; in amdgpu_vm_grab_id()
486 uint64_t pe, uint64_t addr, in amdgpu_vm_do_set_ptes()
515 uint64_t pe, uint64_t addr, in amdgpu_vm_do_copy_ptes()
519 uint64_t src = (params->src + (addr >> 12) * 8); in amdgpu_vm_do_copy_ptes()
544 uint64_t addr; in amdgpu_vm_clear_bo()
600 static uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr) in amdgpu_vm_map_gart()
[all …]
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| /drivers/gpu/drm/amd/include/ |
| D | cgs_common.h | 128 uint64_t size;
132 uint64_t value;
134 uint64_t padding[13];
167 uint64_t mc_addr;
241 uint64_t *mc_start, uint64_t *mc_size,
242 uint64_t *mem_size);
256 typedef int (*cgs_gmap_kmem_t)(struct cgs_device *cgs_device, void *kmem, uint64_t size,
257 uint64_t min_offset, uint64_t max_offset,
258 cgs_handle_t *kmem_handle, uint64_t *mcaddr);
297 uint64_t size, uint64_t align,
[all …]
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| /drivers/md/bcache/ |
| D | util.c | 89 uint64_t q; in STRTO_H()
189 void bch_time_stats_update(struct time_stats *stats, uint64_t start_time) in bch_time_stats_update()
191 uint64_t now, duration, last; in bch_time_stats_update()
228 uint64_t bch_next_delay(struct bch_ratelimit *d, uint64_t done) in bch_next_delay()
230 uint64_t now = local_clock(); in bch_next_delay()
293 static const uint64_t crc_table[256] = {
382 uint64_t bch_crc64_update(uint64_t crc, const void *_data, size_t len) in bch_crc64_update()
394 uint64_t bch_crc64(const void *data, size_t len) in bch_crc64()
396 uint64_t crc = 0xffffffffffffffffULL; in bch_crc64()
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| D | writeback.h | 7 static inline uint64_t bcache_dev_sectors_dirty(struct bcache_device *d) in bcache_dev_sectors_dirty()
9 uint64_t i, ret = 0; in bcache_dev_sectors_dirty()
17 static inline uint64_t bcache_flash_devs_sectors_dirty(struct cache_set *c) in bcache_flash_devs_sectors_dirty()
19 uint64_t i, ret = 0; in bcache_flash_devs_sectors_dirty()
37 uint64_t offset) in offset_to_stripe()
44 uint64_t offset, in bcache_dev_stripe_dirty()
105 void bcache_dev_sectors_dirty_add(struct cache_set *, unsigned, uint64_t, int);
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| /drivers/media/platform/mtk-vcodec/ |
| D | venc_ipi_msg.h | 54 uint64_t venc_inst;
122 uint64_t venc_inst;
139 uint64_t venc_inst;
156 uint64_t venc_inst;
191 uint64_t venc_inst;
207 uint64_t venc_inst;
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| /drivers/xen/ |
| D | platform-pci.c | 45 static uint64_t callback_via;
58 static uint64_t get_callback_via(struct pci_dev *pdev) in get_callback_via()
70 return ((uint64_t)0x01 << 56) | /* PCI INTx identifier */ in get_callback_via()
71 ((uint64_t)pci_domain_nr(pdev->bus) << 32) | in get_callback_via()
72 ((uint64_t)pdev->bus->number << 16) | in get_callback_via()
73 ((uint64_t)(pdev->devfn & 0xff) << 8) | in get_callback_via()
74 ((uint64_t)(pin - 1) & 3); in get_callback_via()
|