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Searched refs:vco_min (Results 1 – 17 of 17) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Damdgpu_pll.c157 unsigned vco_min, vco_max; in amdgpu_pll_compute() local
160 vco_min = pll->lcd_pll_out_min; in amdgpu_pll_compute()
163 vco_min = pll->pll_out_min; in amdgpu_pll_compute()
168 vco_min *= 10; in amdgpu_pll_compute()
172 post_div_min = vco_min / target_clock; in amdgpu_pll_compute()
173 if ((target_clock * post_div_min) < vco_min) in amdgpu_pll_compute()
/drivers/clk/tegra/
Dclk-pll.c1179 p = DIV_ROUND_UP(pll->params->vco_min, rate); in _calc_dynamic_ramp_rate()
1209 static unsigned long _clip_vco_min(unsigned long vco_min, in _clip_vco_min() argument
1212 return DIV_ROUND_UP(vco_min, parent_rate) * parent_rate; in _clip_vco_min()
1986 pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate); in tegra_clk_register_pllxc()
1989 pll_params->vco_min = pll_params->adjust_vco(pll_params, in tegra_clk_register_pllxc()
2037 pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate); in tegra_clk_register_pllre()
2040 pll_params->vco_min = pll_params->adjust_vco(pll_params, in tegra_clk_register_pllre()
2058 val |= (pll_params->vco_min / parent_rate) << divn_shift(pll); in tegra_clk_register_pllre()
2098 pll_params->vco_min = _clip_vco_min(pll_params->vco_min, parent_rate); in tegra_clk_register_pllm()
2101 pll_params->vco_min = pll_params->adjust_vco(pll_params, in tegra_clk_register_pllm()
[all …]
Dclk-tegra210.c1197 p = DIV_ROUND_UP(params->vco_min, rate); in tegra210_pll_fixed_mdiv_cfg()
1200 p = rate >= params->vco_min ? 1 : -EINVAL; in tegra210_pll_fixed_mdiv_cfg()
1259 unsigned long vco_min = params->vco_min; in tegra210_clk_adjust_vco_min() local
1261 params->vco_min += DIV_ROUND_UP(parent_rate, PLL_SDM_COEFF); in tegra210_clk_adjust_vco_min()
1262 vco_min = min(vco_min, params->vco_min); in tegra210_clk_adjust_vco_min()
1264 return vco_min; in tegra210_clk_adjust_vco_min()
1359 .vco_min = 1350000000,
1410 .vco_min = 600000000,
1449 .vco_min = 600000000,
1479 .vco_min = 600000000,
[all …]
Dclk-tegra124.c179 .vco_min = 700000000,
213 .vco_min = 600000000,
267 .vco_min = 600000000,
289 .vco_min = 600000000,
348 .vco_min = 600000000,
411 .vco_min = 400000000,
469 .vco_min = 1600000000,
508 .vco_min = 300000000,
545 .vco_min = 200000000,
574 .vco_min = 200000000,
[all …]
Dclk-tegra114.c193 .vco_min = 600000000,
244 .vco_min = 600000000,
266 .vco_min = 600000000,
315 .vco_min = 400000000,
355 .vco_min = 200000000,
385 .vco_min = 200000000,
421 .vco_min = 500000000,
439 .vco_min = 500000000,
481 .vco_min = 480000000,
510 .vco_min = 700000000,
[all …]
Dclk-tegra20.c291 .vco_min = 20000000,
307 .vco_min = 20000000,
323 .vco_min = 20000000,
341 .vco_min = 20000000,
357 .vco_min = 40000000,
379 .vco_min = 48000000,
396 .vco_min = 20000000,
412 .vco_min = 0,
Dclk-tegra30.c367 .vco_min = 20000000,
396 .vco_min = 20000000,
417 .vco_min = 20000000,
435 .vco_min = 20000000,
452 .vco_min = 40000000,
469 .vco_min = 40000000,
486 .vco_min = 48000000,
504 .vco_min = 20000000,
521 .vco_min = 1200000000,
Dclk.h252 unsigned long vco_min; member
/drivers/clk/versatile/
Dclk-icst.c427 .vco_min = ICST525_VCO_MIN,
438 .vco_min = ICST307_VCO_MIN,
453 .vco_min = ICST525_VCO_MIN,
471 .vco_min = ICST525_VCO_MIN,
485 .vco_min = ICST525_VCO_MIN,
Dclk-versatile.c27 .vco_min = ICST525_VCO_MIN,
44 .vco_min = ICST307_VCO_MIN,
Dclk-impd1.c48 .vco_min = ICST525_VCO_MIN,
66 .vco_min = ICST525_VCO_MIN,
Dclk-realview.c30 .vco_min = ICST307_VCO_MIN,
/drivers/cpufreq/
Dintegrator-cpufreq.c35 .vco_min = ICST525_VCO_MIN,
47 .vco_min = ICST525_VCO_MIN,
/drivers/gpu/drm/radeon/
Dradeon_uvd.c961 unsigned vco_min, unsigned vco_max, in radeon_uvd_calc_upll_dividers() argument
975 vco_min = max(max(vco_min, vclk), dclk); in radeon_uvd_calc_upll_dividers()
976 for (vco_freq = vco_min; vco_freq <= vco_max; vco_freq += 100) { in radeon_uvd_calc_upll_dividers()
Dradeon_display.c1007 unsigned vco_min, vco_max; in radeon_compute_pll_avivo() local
1010 vco_min = pll->lcd_pll_out_min; in radeon_compute_pll_avivo()
1013 vco_min = pll->pll_out_min; in radeon_compute_pll_avivo()
1018 vco_min *= 10; in radeon_compute_pll_avivo()
1022 post_div_min = vco_min / target_clock; in radeon_compute_pll_avivo()
1023 if ((target_clock * post_div_min) < vco_min) in radeon_compute_pll_avivo()
Dradeon.h1712 unsigned vco_min, unsigned vco_max,
/drivers/media/tuners/
Dr820t.c535 u32 vco_min = 1770000; in r820t_set_pll() local
536 u32 vco_max = vco_min * 2; in r820t_set_pll()
586 if (((freq * mix_div) >= vco_min) && in r820t_set_pll()