| /drivers/gpu/drm/bridge/adv7511/ |
| D | adv7533.c | 46 unsigned int hsw, hfp, hbp, vsw, vfp, vbp; in adv7511_dsi_config_timing_gen() local
52 vsw = mode->vsync_end - mode->vsync_start; in adv7511_dsi_config_timing_gen()
73 regmap_write(adv->regmap_cec, 0x32, vsw >> 4); in adv7511_dsi_config_timing_gen()
74 regmap_write(adv->regmap_cec, 0x33, (vsw << 4) & 0xff); in adv7511_dsi_config_timing_gen()
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| /drivers/gpu/drm/fsl-dcu/ |
| D | fsl_dcu_drm_crtc.c | 87 unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0; in fsl_dcu_drm_crtc_mode_set_nofb() local
98 vsw = mode->vsync_end - mode->vsync_start; in fsl_dcu_drm_crtc_mode_set_nofb()
116 DCU_VSYN_PARA_PW(vsw) | in fsl_dcu_drm_crtc_mode_set_nofb()
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| /drivers/gpu/drm/omapdrm/dss/ |
| D | hdmi_wp.c | 191 timing_v |= FLD_VAL(timings->vsw, 7, 0); in hdmi_wp_video_config_timing()
209 timings->vsw = param->timings.vsw; in hdmi_wp_init_vid_fmt_timings()
220 timings->vsw /= 2; in hdmi_wp_init_vid_fmt_timings()
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| D | display.c | 234 ovt->vsw = vm->vsync_len; in videomode_to_omap_video_timings()
267 vm->vsync_len = ovt->vsw; in omap_video_timings_to_videomode()
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| /drivers/video/fbdev/ |
| D | carminefb.c | 66 u32 vsw; member
109 .vsw = 2,
121 .vsw = 2,
370 u32 hdp, vdp, htp, hsp, hsw, vtr, vsp, vsw; in set_display_parameters() local
383 vsw = par->res->vsw - 1; in set_display_parameters()
390 (vsw << CARMINE_DISP_VSW_SHIFT) | in set_display_parameters()
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| /drivers/gpu/drm/tilcdc/ |
| D | tilcdc_crtc.c | 360 uint32_t reg, hbp, hfp, hsw, vbp, vfp, vsw; in tilcdc_crtc_mode_set_nofb() local
403 vsw = mode->vsync_end - mode->vsync_start; in tilcdc_crtc_mode_set_nofb()
406 mode->hdisplay, mode->vdisplay, hbp, hfp, hsw, vbp, vfp, vsw); in tilcdc_crtc_mode_set_nofb()
437 (((vsw-1) & 0x3f) << 10); in tilcdc_crtc_mode_set_nofb()
584 uint32_t hbp, hfp, hsw, vbp, vfp, vsw; in tilcdc_crtc_mode_valid() local
609 vsw = mode->vsync_end - mode->vsync_start; in tilcdc_crtc_mode_valid()
636 if ((vsw-1) & ~0x3f) { in tilcdc_crtc_mode_valid()
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| /drivers/net/ethernet/sun/ |
| D | sunvnet_common.h | 49 unsigned vsw:1; member
119 ((__port)->vsw ? (__port)->dev : (__port)->vp->dev)
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| /drivers/video/fbdev/omap2/omapfb/dss/ |
| D | hdmi_wp.c | 178 timing_v |= FLD_VAL(timings->vsw, 7, 0); in hdmi_wp_video_config_timing()
198 timings->vsw = param->timings.vsw; in hdmi_wp_init_vid_fmt_timings()
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| D | display.c | 283 ovt->vsw = vm->vsync_len; in videomode_to_omap_video_timings()
316 vm->vsync_len = ovt->vsw; in omap_video_timings_to_videomode()
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| D | display-sysfs.c | 110 t.y_res, t.vfp, t.vbp, t.vsw); in display_timings_show()
135 &t.y_res, &t.vfp, &t.vbp, &t.vsw) != 9) in display_timings_store()
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| D | hdmi5_core.c | 306 video_cfg->v_fc_config.timings.vsw = cfg->timings.vsw; in hdmi_core_init()
310 video_cfg->vblank = cfg->timings.vsw + in hdmi_core_init()
375 cfg->v_fc_config.timings.vsw, 5, 0); in hdmi_core_video_config()
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| /drivers/gpu/drm/hisilicon/kirin/ |
| D | dw_drm_dsi.c | 451 u32 hfp, hbp, hsw, vfp, vbp, vsw; in dsi_set_mode_timing() local
482 vsw = mode->vsync_end - mode->vsync_start; in dsi_set_mode_timing()
483 if (vsw > 15) { in dsi_set_mode_timing()
485 vsw = 15; in dsi_set_mode_timing()
498 writel(vsw, base + VID_VSA_LINES); in dsi_set_mode_timing()
507 vtot, vfp, vbp, vsw); in dsi_set_mode_timing()
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| D | kirin_drm_ade.c | 206 u32 hfp, hbp, hsw, vfp, vbp, vsw; in ade_ldi_set_mode() local
216 vsw = mode->vsync_end - mode->vsync_start; in ade_ldi_set_mode()
217 if (vsw > 15) { in ade_ldi_set_mode()
219 vsw = 15; in ade_ldi_set_mode()
227 writel(vsw - 1, base + LDI_VRT_CTRL1); in ade_ldi_set_mode()
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| /drivers/video/fbdev/omap/ |
| D | hwa742.c | 792 int hsw, vsw; in setup_tearsync() local
799 vsw = hwa742_read_reg(HWA742_VS_W_REG); in setup_tearsync()
801 vs_pol_inv = !(vsw & 0x80); in setup_tearsync()
803 vsw = vsw & 0x3f; in setup_tearsync()
859 vs = vsw; in setup_tearsync()
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| D | lcd_palmz71.c | 67 .vsw = 1,
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| D | lcd_htcherald.c | 74 .vsw = 3,
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| D | lcd_palmtt.c | 72 .vsw = 1,
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| D | lcd_palmte.c | 66 .vsw = 1,
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| D | lcd_inn1510.c | 68 .vsw = 1,
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| D | lcd_osk.c | 88 .vsw = 1,
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| D | lcd_h3.c | 83 .vsw = 1,
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| D | lcd_inn1610.c | 89 .vsw = 1,
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| D | lcd_ams_delta.c | 156 .vsw = 1,
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| /drivers/gpu/drm/omapdrm/ |
| D | omap_connector.c | 57 mode->vsync_end = mode->vsync_start + timings->vsw; in copy_timings_omap_to_drm()
91 timings->vsw = mode->vsync_end - mode->vsync_start; in copy_timings_drm_to_omap()
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| /drivers/gpu/drm/msm/mdp/mdp5/ |
| D | mdp5_kms.c | 459 int line, vsw, vbp, vactive_start, vactive_end, vfp_end; in mdp5_get_scanoutpos() local
476 vsw = mode->crtc_vsync_end - mode->crtc_vsync_start; in mdp5_get_scanoutpos()
485 vactive_start = vsw + vbp + 1; in mdp5_get_scanoutpos()
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