| /drivers/infiniband/hw/hfi1/ |
| D | pio_copy.c | 79 writeq(pbc, dest); in pio_copy()
92 writeq(*(u64 *)from, dest); in pio_copy()
108 writeq(*(u64 *)from, dest); in pio_copy()
127 writeq(*(u64 *)from, dest); in pio_copy()
138 writeq(*(u64 *)from, dest); in pio_copy()
151 writeq(val.val64, dest); in pio_copy()
159 writeq(0, dest); in pio_copy()
266 writeq(temp, dest); in merge_write8()
275 writeq(carry.val64, dest); in carry8_write8()
287 writeq(pbuf->carry.val64, dest); in carry_write8()
[all …]
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| /drivers/net/ethernet/neterion/ |
| D | s2io.c | 1144 writeq(val64, &bar0->tti_data1_mem); in init_tti()
1169 writeq(val64, &bar0->tti_data2_mem); in init_tti()
1174 writeq(val64, &bar0->tti_command_mem); in init_tti()
1219 writeq(val64, &bar0->sw_reset); in init_nic()
1226 writeq(val64, &bar0->sw_reset); in init_nic()
1248 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1250 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1260 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in init_nic()
1281 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1282 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
[all …]
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| /drivers/net/ethernet/neterion/vxge/ |
| D | vxge-traffic.c | 51 writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_reg); in vxge_hw_vpath_intr_enable()
107 writeq((u32)vxge_bVALn((VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO1_OVRFLOW| in vxge_hw_vpath_intr_enable()
183 writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_mask); in vxge_hw_vpath_intr_disable()
239 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]); in vxge_hw_vpath_tti_ci_set()
249 writeq(val64, &ring->vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]); in vxge_hw_vpath_dynamic_rti_ci_set()
262 writeq(val64, &fifo->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]); in vxge_hw_vpath_dynamic_tti_rtimer_set()
278 writeq(val64, &ring->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]); in vxge_hw_vpath_dynamic_rti_rtimer_set()
388 writeq(val64, &hldev->common_reg->tim_int_status0); in vxge_hw_device_intr_enable()
390 writeq(~val64, &hldev->common_reg->tim_int_mask0); in vxge_hw_device_intr_enable()
427 writeq(VXGE_HW_INTR_MASK_ALL, &hldev->common_reg->tim_int_mask0); in vxge_hw_device_intr_disable()
[all …]
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| D | vxge-config.c | 40 writeq(val64, &vp_reg->rxmac_vcfg0); in vxge_hw_vpath_set_zero_rx_frm_len()
172 writeq(*data0, &vp_reg->rts_access_steer_data0); in vxge_hw_vpath_fw_api()
173 writeq(*data1, &vp_reg->rts_access_steer_data1); in vxge_hw_vpath_fw_api()
529 writeq(VXGE_HW_SWAPPER_READ_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set()
531 writeq(VXGE_HW_SWAPPER_READ_BIT_FLAP_ENABLE, in __vxge_hw_legacy_swapper_set()
533 writeq(VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set()
535 writeq(VXGE_HW_SWAPPER_WRITE_BIT_FLAP_ENABLE, in __vxge_hw_legacy_swapper_set()
540 writeq(VXGE_HW_SWAPPER_READ_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set()
542 writeq(VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set()
547 writeq(VXGE_HW_SWAPPER_READ_BIT_FLAP_ENABLE, in __vxge_hw_legacy_swapper_set()
[all …]
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| /drivers/spi/ |
| D | spi-cavium.c | 66 writeq(mpi_cfg.u64, p->register_base + OCTEON_SPI_CFG(p)); in octeon_spi_do_transfer()
78 writeq(d, p->register_base + OCTEON_SPI_DAT0(p) + (8 * i)); in octeon_spi_do_transfer()
85 writeq(mpi_tx.u64, p->register_base + OCTEON_SPI_TX(p)); in octeon_spi_do_transfer()
102 writeq(d, p->register_base + OCTEON_SPI_DAT0(p) + (8 * i)); in octeon_spi_do_transfer()
113 writeq(mpi_tx.u64, p->register_base + OCTEON_SPI_TX(p)); in octeon_spi_do_transfer()
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| D | spi-cavium-octeon.c | 80 writeq(0, p->register_base + OCTEON_SPI_CFG(p)); in octeon_spi_remove()
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| /drivers/char/hw_random/ |
| D | cavium-rng.c | 45 writeq(THUNDERX_RNM_RNG_EN | THUNDERX_RNM_ENT_EN, in cavium_rng_probe()
54 writeq(0, rng->control_status); in cavium_rng_probe()
75 writeq(0, rng->control_status); in cavium_rng_remove()
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| /drivers/pci/host/ |
| D | pci-thunder-pem.c | 50 writeq(read_val, pem_pci->pem_reg_base + PEM_CFG_RD); in thunder_pem_bridge_read()
216 writeq(where_aligned, pem_pci->pem_reg_base + PEM_CFG_RD); in thunder_pem_bridge_write()
225 writeq(where_aligned, pem_pci->pem_reg_base + PEM_CFG_RD); in thunder_pem_bridge_write()
264 writeq(write_val, pem_pci->pem_reg_base + PEM_CFG_WR); in thunder_pem_bridge_write()
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| /drivers/char/ |
| D | hpet.c | 58 #define write_counter(V, MC) writeq(V, MC)
133 #ifndef writeq
134 static inline void writeq(unsigned long long v, void __iomem *addr) in writeq() function
428 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), in hpet_release()
442 writeq(v, &timer->hpet_config); in hpet_release()
532 writeq(v, &timer->hpet_config); in hpet_ioctl_ieon()
559 writeq(g, &timer->hpet_config); in hpet_ioctl_ieon()
610 writeq(v, &timer->hpet_config); in hpet_ioctl_common()
647 writeq(v, &timer->hpet_config); in hpet_ioctl_common()
927 writeq(mcfg, &hpet->hpet_config); in hpet_alloc()
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| /drivers/net/ethernet/intel/ixgbe/ |
| D | ixgbe_common.h | 167 #ifndef writeq
168 #define writeq writeq macro
169 static inline void writeq(u64 val, void __iomem *addr) in writeq() function
182 writeq(value, reg_addr + reg); in ixgbe_write_reg64()
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| /drivers/net/ethernet/cavium/liquidio/ |
| D | cn23xx_pf_device.c | 455 writeq((readq(inst_cnt_reg) & in cn23xx_pf_setup_global_input_regs()
530 writeq(0x40, (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_OQ_WMARK); in cn23xx_pf_setup_global_output_regs()
538 writeq(readq((u8 *)oct->mmio[0].hw_addr + in cn23xx_pf_setup_global_output_regs()
544 writeq(0xffffffffffffffffULL, in cn23xx_pf_setup_global_output_regs()
547 writeq(0xffffffffffffffffULL, in cn23xx_pf_setup_global_output_regs()
603 writeq((pkt_in_done | CN23XX_INTR_CINT_ENB), in cn23xx_setup_iq_regs()
609 writeq(pkt_in_done, iq->inst_cnt_reg); in cn23xx_setup_iq_regs()
885 writeq(intr64, cn23xx->intr_sum_reg64); in cn23xx_interrupt_handler()
959 writeq(cn23xx->intr_mask64, cn23xx->intr_enb_reg64); in cn23xx_enable_pf_interrupt()
963 writeq(intr_val, cn23xx->intr_enb_reg64); in cn23xx_enable_pf_interrupt()
[all …]
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| /drivers/scsi/snic/ |
| D | vnic_cq.c | 62 writeq(paddr, &cq->ctrl->ring_base); in svnic_cq_init()
73 writeq(cq_message_addr, &cq->ctrl->cq_message_addr); in svnic_cq_init()
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| D | vnic_dev.h | 34 static inline void writeq(u64 val, void __iomem *reg) in writeq() function
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| /drivers/scsi/fnic/ |
| D | vnic_cq.c | 61 writeq(paddr, &cq->ctrl->ring_base); in vnic_cq_init()
72 writeq(cq_message_addr, &cq->ctrl->cq_message_addr); in vnic_cq_init()
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| /drivers/net/ethernet/cisco/enic/ |
| D | vnic_cq.c | 66 writeq(paddr, &cq->ctrl->ring_base); in vnic_cq_init()
77 writeq(cq_message_addr, &cq->ctrl->cq_message_addr); in vnic_cq_init()
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| /drivers/ntb/hw/amd/ |
| D | ntb_hw_amd.h | 82 #ifdef writeq
83 #define write64 writeq
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| /drivers/net/ethernet/chelsio/cxgb4vf/ |
| D | adapter.h | 449 static inline void writeq(u64 val, volatile void __iomem *addr) in writeq() function
479 writeq(val, adapter->regs + reg_addr); in t4_write_reg64()
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| /drivers/net/ethernet/intel/i40evf/ |
| D | i40e_osdep.h | 48 #define wr64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))
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| /drivers/net/ethernet/intel/i40e/ |
| D | i40e_osdep.h | 49 #define wr64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))
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| /drivers/scsi/csiostor/ |
| D | csio_defs.h | 59 static inline void writeq(u64 val, void __iomem *addr) in writeq() function
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| /drivers/parport/ |
| D | parport_ip32.c | 531 writeq(ctxval, ctxreg); in parport_ip32_dma_setup_context()
592 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_start()
612 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_start()
621 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_start()
659 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_stop()
682 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_stop()
715 writeq(MACEPAR_CTLSTAT_RESET, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_register()
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| /drivers/misc/mic/scif/ |
| D | scif_main.c | 187 writeq(scifdev->qp_dma_addr, &bp->scif_card_dma_addr); in scif_probe()
229 writeq(0x0, &bp->scif_card_dma_addr); in scif_remove()
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| /drivers/scsi/smartpqi/ |
| D | smartpqi.h | 1121 #if !defined(writeq)
1122 #define writeq writeq macro
1123 static inline void writeq(u64 value, volatile void __iomem *addr) in writeq() function
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| /drivers/net/phy/ |
| D | mdio-cavium.h | 114 #define oct_mdio_writeq(val, addr) writeq(val, (void *)addr)
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| /drivers/infiniband/hw/qib/ |
| D | qib_7220.h | 141 writeq(value, &dd->kregbase[regno]); in qib_write_kreg()
|