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Searched refs:BA0_CLKCR1 (Results 1 – 3 of 3) sorted by relevance

/sound/pci/
Dcs4281.c221 #define BA0_CLKCR1 0x0400 /* Clock Control Register 1 */ macro
1311 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs4281_free()
1456 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs4281_chip_init()
1486 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_DLLP); in snd_cs4281_chip_init()
1488 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_SWCE | BA0_CLKCR1_DLLP); in snd_cs4281_chip_init()
1499 if (snd_cs4281_peekBA0(chip, BA0_CLKCR1) & BA0_CLKCR1_DLLRDY) in snd_cs4281_chip_init()
2010 ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1); in cs4281_suspend()
2012 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK); in cs4281_suspend()
2029 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); in cs4281_suspend()
2034 ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1); in cs4281_suspend()
[all …]
/sound/pci/cs46xx/
Dcs46xx_lib.c633 tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1); in snd_cs46xx_clear_serial_FIFOs()
635 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp | CLKCR1_SWCE); in snd_cs46xx_clear_serial_FIFOs()
659 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); in snd_cs46xx_clear_serial_FIFOs()
677 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); in snd_cs46xx_clear_serial_FIFOs()
2912 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs46xx_hw_stop()
2918 tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1) & ~CLKCR1_SWCE; in snd_cs46xx_hw_stop()
2919 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); in snd_cs46xx_hw_stop()
2994 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs46xx_chip_init()
3060 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, CLKCR1_PLLP); in snd_cs46xx_chip_init()
3070 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, CLKCR1_PLLP | CLKCR1_SWCE); in snd_cs46xx_chip_init()
[all …]
Dcs46xx.h67 #define BA0_CLKCR1 0x00000400 macro