1 /*
2 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
3 * Copyright (c) 2015, Google Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15 #ifndef __PHY_TEGRA_XUSB_H
16 #define __PHY_TEGRA_XUSB_H
17
18 #include <linux/io.h>
19 #include <linux/mutex.h>
20 #include <linux/workqueue.h>
21
22 /* legacy entry points for backwards-compatibility */
23 int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);
24 int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);
25
26 struct phy;
27 struct phy_provider;
28 struct platform_device;
29 struct regulator;
30
31 /*
32 * lanes
33 */
34 struct tegra_xusb_lane_soc {
35 const char *name;
36
37 unsigned int offset;
38 unsigned int shift;
39 unsigned int mask;
40
41 const char * const *funcs;
42 unsigned int num_funcs;
43 };
44
45 struct tegra_xusb_lane {
46 const struct tegra_xusb_lane_soc *soc;
47 struct tegra_xusb_pad *pad;
48 struct device_node *np;
49 struct list_head list;
50 unsigned int function;
51 unsigned int index;
52 };
53
54 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
55 struct device_node *np);
56
57 struct tegra_xusb_usb2_lane {
58 struct tegra_xusb_lane base;
59
60 u32 hs_curr_level_offset;
61 };
62
63 static inline struct tegra_xusb_usb2_lane *
to_usb2_lane(struct tegra_xusb_lane * lane)64 to_usb2_lane(struct tegra_xusb_lane *lane)
65 {
66 return container_of(lane, struct tegra_xusb_usb2_lane, base);
67 }
68
69 struct tegra_xusb_ulpi_lane {
70 struct tegra_xusb_lane base;
71 };
72
73 static inline struct tegra_xusb_ulpi_lane *
to_ulpi_lane(struct tegra_xusb_lane * lane)74 to_ulpi_lane(struct tegra_xusb_lane *lane)
75 {
76 return container_of(lane, struct tegra_xusb_ulpi_lane, base);
77 }
78
79 struct tegra_xusb_hsic_lane {
80 struct tegra_xusb_lane base;
81
82 u32 strobe_trim;
83 u32 rx_strobe_trim;
84 u32 rx_data_trim;
85 u32 tx_rtune_n;
86 u32 tx_rtune_p;
87 u32 tx_rslew_n;
88 u32 tx_rslew_p;
89 bool auto_term;
90 };
91
92 static inline struct tegra_xusb_hsic_lane *
to_hsic_lane(struct tegra_xusb_lane * lane)93 to_hsic_lane(struct tegra_xusb_lane *lane)
94 {
95 return container_of(lane, struct tegra_xusb_hsic_lane, base);
96 }
97
98 struct tegra_xusb_pcie_lane {
99 struct tegra_xusb_lane base;
100 };
101
102 static inline struct tegra_xusb_pcie_lane *
to_pcie_lane(struct tegra_xusb_lane * lane)103 to_pcie_lane(struct tegra_xusb_lane *lane)
104 {
105 return container_of(lane, struct tegra_xusb_pcie_lane, base);
106 }
107
108 struct tegra_xusb_sata_lane {
109 struct tegra_xusb_lane base;
110 };
111
112 static inline struct tegra_xusb_sata_lane *
to_sata_lane(struct tegra_xusb_lane * lane)113 to_sata_lane(struct tegra_xusb_lane *lane)
114 {
115 return container_of(lane, struct tegra_xusb_sata_lane, base);
116 }
117
118 struct tegra_xusb_lane_ops {
119 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad,
120 struct device_node *np,
121 unsigned int index);
122 void (*remove)(struct tegra_xusb_lane *lane);
123 };
124
125 /*
126 * pads
127 */
128 struct tegra_xusb_pad_soc;
129 struct tegra_xusb_padctl;
130
131 struct tegra_xusb_pad_ops {
132 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl,
133 const struct tegra_xusb_pad_soc *soc,
134 struct device_node *np);
135 void (*remove)(struct tegra_xusb_pad *pad);
136 };
137
138 struct tegra_xusb_pad_soc {
139 const char *name;
140
141 const struct tegra_xusb_lane_soc *lanes;
142 unsigned int num_lanes;
143
144 const struct tegra_xusb_pad_ops *ops;
145 };
146
147 struct tegra_xusb_pad {
148 const struct tegra_xusb_pad_soc *soc;
149 struct tegra_xusb_padctl *padctl;
150 struct phy_provider *provider;
151 struct phy **lanes;
152 struct device dev;
153
154 const struct tegra_xusb_lane_ops *ops;
155
156 struct list_head list;
157 };
158
to_tegra_xusb_pad(struct device * dev)159 static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev)
160 {
161 return container_of(dev, struct tegra_xusb_pad, dev);
162 }
163
164 int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,
165 struct tegra_xusb_padctl *padctl,
166 struct device_node *np);
167 int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
168 const struct phy_ops *ops);
169 void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);
170
171 struct tegra_xusb_usb2_pad {
172 struct tegra_xusb_pad base;
173
174 struct clk *clk;
175 unsigned int enable;
176 struct mutex lock;
177 };
178
179 static inline struct tegra_xusb_usb2_pad *
to_usb2_pad(struct tegra_xusb_pad * pad)180 to_usb2_pad(struct tegra_xusb_pad *pad)
181 {
182 return container_of(pad, struct tegra_xusb_usb2_pad, base);
183 }
184
185 struct tegra_xusb_ulpi_pad {
186 struct tegra_xusb_pad base;
187 };
188
189 static inline struct tegra_xusb_ulpi_pad *
to_ulpi_pad(struct tegra_xusb_pad * pad)190 to_ulpi_pad(struct tegra_xusb_pad *pad)
191 {
192 return container_of(pad, struct tegra_xusb_ulpi_pad, base);
193 }
194
195 struct tegra_xusb_hsic_pad {
196 struct tegra_xusb_pad base;
197
198 struct regulator *supply;
199 struct clk *clk;
200 };
201
202 static inline struct tegra_xusb_hsic_pad *
to_hsic_pad(struct tegra_xusb_pad * pad)203 to_hsic_pad(struct tegra_xusb_pad *pad)
204 {
205 return container_of(pad, struct tegra_xusb_hsic_pad, base);
206 }
207
208 struct tegra_xusb_pcie_pad {
209 struct tegra_xusb_pad base;
210
211 struct reset_control *rst;
212 struct clk *pll;
213
214 unsigned int enable;
215 };
216
217 static inline struct tegra_xusb_pcie_pad *
to_pcie_pad(struct tegra_xusb_pad * pad)218 to_pcie_pad(struct tegra_xusb_pad *pad)
219 {
220 return container_of(pad, struct tegra_xusb_pcie_pad, base);
221 }
222
223 struct tegra_xusb_sata_pad {
224 struct tegra_xusb_pad base;
225
226 struct reset_control *rst;
227 struct clk *pll;
228
229 unsigned int enable;
230 };
231
232 static inline struct tegra_xusb_sata_pad *
to_sata_pad(struct tegra_xusb_pad * pad)233 to_sata_pad(struct tegra_xusb_pad *pad)
234 {
235 return container_of(pad, struct tegra_xusb_sata_pad, base);
236 }
237
238 /*
239 * ports
240 */
241 struct tegra_xusb_port_ops;
242
243 struct tegra_xusb_port {
244 struct tegra_xusb_padctl *padctl;
245 struct tegra_xusb_lane *lane;
246 unsigned int index;
247
248 struct list_head list;
249 struct device dev;
250
251 const struct tegra_xusb_port_ops *ops;
252 };
253
254 struct tegra_xusb_lane_map {
255 unsigned int port;
256 const char *type;
257 unsigned int index;
258 const char *func;
259 };
260
261 struct tegra_xusb_lane *
262 tegra_xusb_port_find_lane(struct tegra_xusb_port *port,
263 const struct tegra_xusb_lane_map *map,
264 const char *function);
265
266 struct tegra_xusb_port *
267 tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,
268 unsigned int index);
269
270 struct tegra_xusb_usb2_port {
271 struct tegra_xusb_port base;
272
273 struct regulator *supply;
274 bool internal;
275 };
276
277 static inline struct tegra_xusb_usb2_port *
to_usb2_port(struct tegra_xusb_port * port)278 to_usb2_port(struct tegra_xusb_port *port)
279 {
280 return container_of(port, struct tegra_xusb_usb2_port, base);
281 }
282
283 struct tegra_xusb_usb2_port *
284 tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl,
285 unsigned int index);
286
287 struct tegra_xusb_ulpi_port {
288 struct tegra_xusb_port base;
289
290 struct regulator *supply;
291 bool internal;
292 };
293
294 static inline struct tegra_xusb_ulpi_port *
to_ulpi_port(struct tegra_xusb_port * port)295 to_ulpi_port(struct tegra_xusb_port *port)
296 {
297 return container_of(port, struct tegra_xusb_ulpi_port, base);
298 }
299
300 struct tegra_xusb_hsic_port {
301 struct tegra_xusb_port base;
302 };
303
304 static inline struct tegra_xusb_hsic_port *
to_hsic_port(struct tegra_xusb_port * port)305 to_hsic_port(struct tegra_xusb_port *port)
306 {
307 return container_of(port, struct tegra_xusb_hsic_port, base);
308 }
309
310 struct tegra_xusb_usb3_port {
311 struct tegra_xusb_port base;
312 struct regulator *supply;
313 bool context_saved;
314 unsigned int port;
315 bool internal;
316
317 u32 tap1;
318 u32 amp;
319 u32 ctle_z;
320 u32 ctle_g;
321 };
322
323 static inline struct tegra_xusb_usb3_port *
to_usb3_port(struct tegra_xusb_port * port)324 to_usb3_port(struct tegra_xusb_port *port)
325 {
326 return container_of(port, struct tegra_xusb_usb3_port, base);
327 }
328
329 struct tegra_xusb_usb3_port *
330 tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl,
331 unsigned int index);
332
333 struct tegra_xusb_port_ops {
334 int (*enable)(struct tegra_xusb_port *port);
335 void (*disable)(struct tegra_xusb_port *port);
336 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port);
337 };
338
339 /*
340 * pad controller
341 */
342 struct tegra_xusb_padctl_soc;
343
344 struct tegra_xusb_padctl_ops {
345 struct tegra_xusb_padctl *
346 (*probe)(struct device *dev,
347 const struct tegra_xusb_padctl_soc *soc);
348 void (*remove)(struct tegra_xusb_padctl *padctl);
349
350 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl,
351 unsigned int index);
352 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl,
353 unsigned int index, bool idle);
354 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl,
355 unsigned int index, bool enable);
356 };
357
358 struct tegra_xusb_padctl_soc {
359 const struct tegra_xusb_pad_soc * const *pads;
360 unsigned int num_pads;
361
362 struct {
363 struct {
364 const struct tegra_xusb_port_ops *ops;
365 unsigned int count;
366 } usb2, ulpi, hsic, usb3;
367 } ports;
368
369 const struct tegra_xusb_padctl_ops *ops;
370 };
371
372 struct tegra_xusb_padctl {
373 struct device *dev;
374 void __iomem *regs;
375 struct mutex lock;
376 struct reset_control *rst;
377
378 const struct tegra_xusb_padctl_soc *soc;
379
380 struct tegra_xusb_pad *pcie;
381 struct tegra_xusb_pad *sata;
382 struct tegra_xusb_pad *ulpi;
383 struct tegra_xusb_pad *usb2;
384 struct tegra_xusb_pad *hsic;
385
386 struct list_head ports;
387 struct list_head lanes;
388 struct list_head pads;
389
390 unsigned int enable;
391
392 struct clk *clk;
393 };
394
padctl_writel(struct tegra_xusb_padctl * padctl,u32 value,unsigned long offset)395 static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
396 unsigned long offset)
397 {
398 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value);
399 writel(value, padctl->regs + offset);
400 }
401
padctl_readl(struct tegra_xusb_padctl * padctl,unsigned long offset)402 static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
403 unsigned long offset)
404 {
405 u32 value = readl(padctl->regs + offset);
406 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value);
407 return value;
408 }
409
410 struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,
411 const char *name,
412 unsigned int index);
413
414 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
415 extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;
416 #endif
417 #if defined(CONFIG_ARCH_TEGRA_210_SOC)
418 extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;
419 #endif
420
421 #endif /* __PHY_TEGRA_XUSB_H */
422