Lines Matching +full:per +full:- +full:processor
1 .. SPDX-License-Identifier: GPL-2.0
24 For the processors supported by ``intel_pstate``, the P-state concept is broader
27 information about that). For this reason, the representation of P-states used
32 ``intel_pstate`` maps its internal representation of P-states to frequencies too
38 Since the hardware P-state selection interface used by ``intel_pstate`` is
43 time the corresponding CPU is taken offline and need to be re-initialized when
47 only way to pass early-configuration-time parameters to it is via the kernel
58 or without hardware-managed P-states support and in the passive mode. Which of
60 on the capabilities of the processor.
63 -----------
70 provides its own scaling algorithms for P-state selection. Those algorithms
73 ``sysfs``). [Note that different P-state selection algorithms may be chosen for
79 For example, the ``powersave`` P-state selection algorithm provided by
83 There are two P-state selection algorithms provided by ``intel_pstate`` in the
85 depends on whether or not the hardware-managed P-states (HWP) feature has been
86 enabled in the processor and possibly on the processor model.
88 Which of the P-state selection algorithms is used by default depends on the
96 If the processor supports the HWP feature, it will be enabled during the
97 processor initialization and cannot be disabled after that. It is possible
101 If the HWP feature has been enabled, ``intel_pstate`` relies on the processor to
102 select P-states by itself, but still it can give hints to the processor's
103 internal P-state selection logic. What those hints are depends on which P-state
107 Even though the P-state selection is carried out by the processor automatically,
109 in this mode. However, they are not used for running a P-state selection
116 In this configuration ``intel_pstate`` will write 0 to the processor's
117 Energy-Performance Preference (EPP) knob (if supported) or its
118 Energy-Performance Bias (EPB) knob (otherwise), which means that the processor's
119 internal P-state selection logic is expected to focus entirely on performance.
124 Also, in this configuration the range of P-states available to the processor's
125 internal P-state selection logic is always restricted to the upper boundary
126 (that is, the maximum P-state that the driver is allowed to use).
131 In this configuration ``intel_pstate`` will set the processor's
132 Energy-Performance Preference (EPP) knob (if supported) or its
133 Energy-Performance Bias (EPB) knob (otherwise) to whatever value it was
135 set to by the platform firmware). This usually causes the processor's
136 internal P-state selection logic to be less performance-focused.
144 to work with the given processor if it does not recognize it. [Note that
145 ``intel_pstate`` will never refuse to work with any processor with the HWP
149 CPU scheduler in order to run a P-state selection algorithm, either
158 Without HWP, this P-state selection algorithm is always the same regardless of
159 the processor model and platform configuration.
161 It selects the maximum P-state it is allowed to use, subject to limits set via
165 This is the default P-state selection algorithm if the
172 Without HWP, this P-state selection algorithm is similar to the algorithm
175 registers of the CPU. It generally selects P-states proportional to the
181 is not touched if the new P-state turns out to be the same as the current
184 This is the default P-state selection algorithm if the
189 ------------
194 refuse to work with the given processor if it does not recognize it.
200 hardware in order to change the P-state of a CPU (in particular, the
205 in ``sysfs`` (and the P-state selection algorithms described above are not
210 the so-called "turbo" frequency ranges). In other words, in the passive mode
211 the entire range of available P-states is exposed by ``intel_pstate`` to the
220 Turbo P-states Support
223 In the majority of cases, the entire range of P-states available to
224 ``intel_pstate`` can be divided into two sub-ranges that correspond to
225 different types of processor behavior, above and below a boundary that
228 The P-states above the turbo threshold are referred to as "turbo P-states" and
229 the whole sub-range of P-states they belong to is referred to as the "turbo
231 multicore processor to opportunistically increase the P-state of one or more
233 thermal envelope of the processor package to be exceeded.
235 Specifically, if software sets the P-state of a CPU core within the turbo range
236 (that is, above the turbo threshold), the processor is permitted to take over
237 performance scaling control for that core and put it into turbo P-states of its
239 different processor generations. Namely, the Sandy Bridge generation of
240 processors will never use any P-states above the last one set by software for
242 processor generations will take it as a license to use any P-states from the
244 processors setting any P-state from the turbo range will enable the processor
245 to put the given core into all turbo P-states up to and including the maximum
248 One important property of turbo P-states is that they are not sustainable. More
250 those states indefinitely, because the power distribution within the processor
252 be exceeded if a turbo P-state was used for too long.
254 In turn, the P-states below the turbo threshold generally are sustainable. In
255 fact, if one of them is set by software, the processor is not expected to change
257 situation (a higher P-state may still be used if it is set for another CPU in
260 Some processors allow multiple cores to be in turbo P-states at the same time,
261 but the maximum P-state that can be set for them generally depends on the number
262 of cores running concurrently. The maximum turbo P-state that can be set for 3
263 cores at the same time usually is lower than the analogous maximum P-state for
264 2 cores, which in turn usually is lower than the maximum turbo P-state that can
265 be set for 1 core. The one-core maximum turbo P-state is thus the maximum
268 The maximum supported turbo P-state, the turbo threshold (the maximum supported
269 non-turbo P-state) and the minimum supported P-state are specific to the
270 processor model and can be determined by reading the processor's model-specific
277 the entire range of available P-states, including the whole turbo range, to the
279 generally causes turbo P-states to be set more often when ``intel_pstate`` is
280 used relative to ACPI-based CPU performance scaling (see `below <acpi-cpufreq_>`_
284 (even if the Configurable TDP feature is enabled in the processor), its
286 work as expected in all cases (that is, if set to disable turbo P-states, it
290 Processor Support
293 To handle a given processor ``intel_pstate`` requires a number of different
296 * The minimum supported P-state.
298 * The maximum supported `non-turbo P-state <turbo_>`_.
300 * Whether or not turbo P-states are supported at all.
302 * The maximum supported `one-core turbo P-state <turbo_>`_ (if turbo P-states
306 of P-states into frequencies and the other way around.
308 Generally, ways to obtain that information are specific to the processor model
309 or family. Although it often is possible to obtain all of it from the processor
310 itself (using model-specific registers), there are cases in which hardware
314 the driver initialization will fail if the detected processor is not in that
325 -----------------
335 Maximum P-state the driver is allowed to set in percent of the
337 P-state <turbo_>`_).
344 Minimum P-state the driver is allowed to set in percent of the
346 P-state <turbo_>`_).
353 Number of P-states supported by the processor (between 0 and 255
354 inclusive) including both turbo and non-turbo P-states (see
355 `Turbo P-states Support`_).
360 This attribute is read-only.
364 range of supported P-states, in percent.
366 This attribute is read-only.
371 If set (equal to 1), the driver is not allowed to set any turbo P-states
372 (see `Turbo P-states Support`_). If unset (equalt to 0, which is the
373 default), turbo P-states can be set by the driver.
380 but it affects the maximum possible value of per-policy P-state limits
386 the processor. If set (equal to 1), it causes the minimum P-state limit
391 This setting has no effect on logical CPUs whose minimum P-state limit
392 is directly set to the highest non-turbo P-state or above it.
415 that string - or to be unregistered in the "off" case. [Actually,
419 as well as the per-policy ones) are then reset to their default
423 the `HWP feature is enabled in the processor <Active Mode With HWP_>`_,
429 -----------------------------------
436 ``scaling_cur_freq`` attributes are produced by applying a processor-specific
437 multiplier to the internal P-state representation used by ``intel_pstate``.
439 attributes are capped by the frequency corresponding to the maximum P-state that
443 not allowed to use turbo P-states, so the maximum value of ``scaling_max_freq``
444 and ``scaling_min_freq`` is limited to the maximum non-turbo P-state frequency.
452 and ``scaling_min_freq`` corresponds to the maximum supported turbo P-state,
459 List of P-state selection algorithms provided by ``intel_pstate``.
462 P-state selection algorithm provided by ``intel_pstate`` currently in
466 Frequency of the average P-state of the CPU represented by the given
471 processor <Active Mode With HWP_>`_:
485 Coordination of P-State Limits
486 ------------------------------
488 ``intel_pstate`` allows P-state limits to be set in two ways: with the help of
498 2. Each individual CPU is affected by its own per-policy limits (that is, it
499 cannot be requested to run faster than its own per-policy maximum and it
500 cannot be requested to run slower than its own per-policy minimum). The
501 effective performance depends on whether the platform supports per core
502 P-states, hyper-threading is enabled and on current performance requests
503 from other CPUs. When platform doesn't support per core P-states, the
505 other CPUs are requesting higher performance at that moment. Even with per
506 core P-states support, when hyper-threading is enabled, if the sibling CPU
510 3. The global and per-policy limits can be set independently.
512 If the `HWP feature is enabled in the processor <Active Mode With HWP_>`_, the
514 change in order to request its internal P-state selection logic to always set
515 P-states within these limits. Otherwise, the limits are taken into account by
517 every time before setting a new P-state for a CPU.
525 ---------------------------
528 <Active Mode With HWP_>`_ in the processor, additional attributes are present
530 user space to help ``intel_pstate`` to adjust the processor's internal P-state
531 selection logic by focusing it on performance or on energy-efficiency, or
545 self-explanatory, except that ``default`` represents whatever hint
549 internally translated to integer values written to the processor's
550 Energy-Performance Preference (EPP) knob (if supported) or its
551 Energy-Performance Bias (EPB) knob.
554 load-balancing algorithm and if different energy vs performance hints are
559 .. _acpi-cpufreq:
561 ``intel_pstate`` vs ``acpi-cpufreq``
571 ``acpi-cpufreq`` scaling driver. On systems supported by ``intel_pstate``
572 the ``acpi-cpufreq`` driver uses the same hardware CPU performance scaling
573 interface, but the set of P-states it can use is limited by the ``_PSS``
576 On those systems each ``_PSS`` object returns a list of P-states supported by
577 the corresponding CPU which basically is a subset of the P-states range that can
581 than the frequency of the highest non-turbo P-state listed by it, but the
582 corresponding P-state representation (following the hardware specification)
583 returned for it matches the maximum supported turbo P-state (or is the
586 The list of P-states returned by ``_PSS`` is reflected by the table of
587 available frequencies supplied by ``acpi-cpufreq`` to the ``CPUFreq`` core and
591 frequency reported by ``acpi-cpufreq`` is higher by 1 MHz than the frequency
592 of the highest supported non-turbo P-state listed by ``_PSS`` which, of course,
598 (possibly multiplied by a constant), then it will tend to choose P-states below
599 the turbo threshold if ``acpi-cpufreq`` is used as the scaling driver, because
603 benefit from running at turbo frequencies will be given non-turbo P-states
608 turbo threshold. Namely, if that is not coordinated with the lists of P-states
610 a turbo P-state in those lists and there may be a problem with avoiding the
612 P-states overall, ``acpi-cpufreq`` simply avoids using the topmost state listed
613 by ``_PSS``, but that is not sufficient when there are other turbo P-states in
616 Apart from the above, ``acpi-cpufreq`` works like ``intel_pstate`` in the
617 `passive mode <Passive Mode_>`_, except that the number of P-states it can set
624 Several kernel command line options can be used to pass early-configuration-time
630 processor is supported by it.
640 ``acpi-cpufreq`` even if the latter is preferred on the given system.
643 power capping) that rely on the availability of ACPI P-states
648 ``intel_pstate`` and on platforms where the ``pcc-cpufreq`` scaling
649 driver is used instead of ``acpi-cpufreq``.
652 Do not enable the `hardware-managed P-states (HWP) feature
653 <Active Mode With HWP_>`_ even if it is supported by the processor.
657 `hardware-managed P-states (HWP) feature <Active Mode With HWP_>`_ is
658 supported by the processor.
669 Use per-logical-CPU P-State limits (see `Coordination of P-state
677 ------------
692 …gnome-terminal--4510 [001] ..s. 1177.680733: pstate_sample: core_busy=107 scaled=94 from=26 to=2…
693 cat-5235 [002] ..s. 1177.681723: cpu_frequency: state=2900000 cpu_id=2
701 ----------
703 The ``ftrace`` interface can be used for low-level diagnostics of
705 P-state is called, the ``ftrace`` filter can be set to to
709 # cat available_filter_functions | grep -i pstate
715 # cat trace | head -15
718 # entries-in-buffer/entries-written: 80/80 #P:4
720 # _-----=> irqs-off
721 # / _----=> need-resched
722 # | / _---=> hardirq/softirq
723 # || / _--=> preempt-depth
725 # TASK-PID CPU# |||| TIMESTAMP FUNCTION
727 Xorg-3129 [000] ..s. 2537.644844: intel_pstate_set_pstate <-intel_pstate_timer_func
728 gnome-terminal--4510 [002] ..s. 2537.649844: intel_pstate_set_pstate <-intel_pstate_timer_func
729 gnome-shell-3409 [001] ..s. 2537.650850: intel_pstate_set_pstate <-intel_pstate_timer_func
730 <idle>-0 [000] ..s. 2537.654843: intel_pstate_set_pstate <-intel_pstate_timer_func
739 .. [2] *Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3: System Programming …
740 …com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system…