Lines Matching +full:fixed +full:- +full:link
10 - SJA1105E: First generation, no TTEthernet
11 - SJA1105T: First generation, TTEthernet
12 - SJA1105P: Second generation, no TTEthernet, no SGMII
13 - SJA1105Q: Second generation, TTEthernet, no SGMII
14 - SJA1105R: Second generation, no TTEthernet, SGMII
15 - SJA1105S: Second generation, TTEthernet, SGMII
17 These are SPI-managed automotive switches, with all ports being gigabit
21 set-and-forget use, with minimal dynamic interaction at runtime. They
56 Also the configuration is write-only (software cannot read it back from the
74 interfere with the reception and transmission of real 802.1Q-tagged traffic,
81 The switches have two programmable filters for link-local destination MACs.
88 +--------------------+------------+------------------+------------------+
93 +--------------------+------------+------------------+------------------+
96 +--------------------+------------+------------------+------------------+
108 The hardware tags all traffic internally with a port-based VLAN (pvid), or it
124 ``vlan_filtering`` enslaves at least one switch port, the other un-bridged
138 The switch ports (swp0-3) are under br0.
140 with swp0-3.
152 Time-aware scheduling
153 ---------------------
156 specified in IEEE 802.1Q-2018 (formerly 802.1Qbv). This means it can be used to
157 ensure deterministic latency for priority traffic that is sent in-band with its
158 gate-open event in the network schedule.
160 This capability can be managed through the tc-taprio offload ('flags 2'). The
166 on the VLAN PCP bits (if no VLAN is present, the port-based default is used).
178 sub-interface on the DSA master port, and send normal (0x8100) VLAN-tagged
181 Management traffic (having DMAC 01-80-C2-xx-xx-xx or 01-19-1B-xx-xx-xx) is the
182 notable exception: the switch always treats it with a fixed priority and
193 set -e -u -o pipefail
208 if ! systemctl is-active --quiet ptp4l; then
214 # Phase-align the base time to the start of the next second.
215 sec=$(echo "${now}" | gawk -F. '{ print $1; }')
222 base-time ${base_time} \
223 sched-entry S $(gatemask 7) 100000 \
224 sched-entry S $(gatemask "0 1 2 3 4 5 6") 400000 \
227 It is possible to apply the tc-taprio offload on multiple egress ports. There
233 At the moment, the time-aware scheduler can only be triggered based on a
234 standalone clock and not based on PTP time. This means the base-time argument
235 from tc-taprio is ignored and the schedule starts right away. It also means it
236 is more difficult to phase-align the scheduler with the other devices in the
245 RMII PHY role and out-of-band signaling
246 ---------------------------------------
253 On the other hand, the SJA1105 is only binary configurable - when in the RMII
257 In the RMII spec, the PHY can transmit extra out-of-band signals via RXD[1:0].
259 preamble of each frame. The MAC does not have this out-of-band signaling
262 clock signal, inevitably an RMII PHY-to-PHY connection is created. The SJA1105
265 simply encodes the extra symbols received from the SJA1105-as-PHY onto the
266 100Base-Tx wire.
267 On the other side of the wire, some link partners might discard these extra
269 frames that follow along. This looks like packet loss with some link partners
271 The take-away is that in RMII mode, the SJA1105 must be let to drive the
274 RGMII fixed-link and internal delays
275 ------------------------------------
286 In RGMII the clock frequency changes with link speed (125 MHz at 1000 Mbps, 25
287 MHz at 100 Mbps and 2.5 MHz at 10 Mbps), and link speed might change during the
289 In the situation where the switch port is connected through an RGMII fixed-link
290 to a link partner whose link state life cycle is outside the control of Linux
293 The take-away is that in RGMII mode, the switch's internal delays are only
294 reliable if the link partner never changes link speeds, or if it does, it does
296 the fixed-link are under control of the same Linux system).
297 As to why would a fixed-link interface ever change link speeds: there are
303 ---------------------------
305 The SJA1105 does not have an MDIO bus and does not perform in-band AN either.
306 Therefore there is no link state notification coming from the switch device.
309 bus). Link state management then works by the driver manually keeping in sync
310 (over SPI commands) the MAC link speed with the settings negotiated by the PHY.