Lines Matching +full:i +full:- +full:cache +full:- +full:sets

7 Provide infrastructure and helpers to integrate non-conventional memory (device
12 HMM also provides optional helpers for SVM (Share Virtual Memory), i.e.,
19 This document is divided as follows: in the first section I expose the problems
20 related to using device specific memory allocators. In the second section, I
23 CPU page-table mirroring works and the purpose of HMM in this context. The
37 regular file backed memory). From here on I will refer to this aspect as split
38 address space. I use shared address space to refer to the opposite situation:
39 i.e., one in which any application memory region can be used by a device
52 For flat data sets (array, grid, image, ...) this isn't too hard to achieve but
53 for complex data sets (list, tree, ...) it's hard to get right. Duplicating a
54 complex data set needs to re-map all the pointer relations between each of its
71 are only do-able with a shared address space. It is also more reasonable to use
75 I/O bus, device memory characteristics
78 I/O buses cripple shared address spaces due to a few limitations. Most I/O
79 buses only allow basic memory access from device to main memory; even cache
81 limited. More often than not, it is not cache coherent.
84 through an IOMMU) and be cache coherent with the CPUs. However, it only allows
95 Some platforms are developing new I/O buses or additions/modifications to PCIE
97 two-way cache coherency between CPU and device and allow all atomic operations the
117 allocate a buffer (or use a pool of pre-allocated buffers) and write GPU
118 specific commands in it to perform the update (unmap, cache invalidations, and
159      /* release() - release hmm_mirror
170      /* sync_cpu_device_pagetables() - synchronize page tables
174       * Return: -EAGAIN if update.blockable false and callback need to
200 entries and will not trigger a page fault on missing or non-present entries.
201 Without that flag, it does trigger a page fault on missing or read-only entries
235       down_read(&mm->mmap_sem);
238           up_read(&mm->mmap_sem);
239           if (ret == -EBUSY) {
250       take_lock(driver->update);
252           release_lock(driver->update);
253           up_read(&mm->mmap_sem);
260       release_lock(driver->update);
261       up_read(&mm->mmap_sem);
265 The driver->update lock is the same lock that the driver takes inside its
271 concurrent device updates in multi-devices scenario.
275 update their own page table. Device updates are a multi-step process. First,
297 it sets::
299     range->default_flags = (1 << 63);
300     range->pfn_flags_mask = 0;
308     range->default_flags = (1 << 63);
309     range->pfn_flags_mask = (1 << 62);
310     range->pfns[index_of_write] = (1 << 62);
312 With this, HMM will fault in all pages with at least read (i.e., valid) and for the
313 address == range->start + (index_of_write << PAGE_SHIFT) it will fault with
314 write permission i.e., if the CPU pte does not have write permission set then HMM