Lines Matching refs:rst
7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
71 resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
436 resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
456 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
476 resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
487 resets = <&rst GPIO0_RESET>;
507 resets = <&rst GPIO1_RESET>;
527 resets = <&rst GPIO2_RESET>;
547 resets = <&rst FPGAMGR_RESET>;
558 resets = <&rst I2C0_RESET>;
569 resets = <&rst I2C1_RESET>;
580 resets = <&rst I2C2_RESET>;
591 resets = <&rst I2C3_RESET>;
602 resets = <&rst I2C4_RESET>;
615 resets = <&rst SPIM0_RESET>;
630 resets = <&rst SPIM1_RESET>;
659 resets = <&rst SDMMC_RESET>;
673 resets = <&rst NAND_RESET>;
758 resets = <&rst QSPI_RESET>, <&rst QSPI_OCP_RESET>;
763 rst: rstmgr@ffd05000 { label
765 compatible = "altr,rst-mgr";
795 resets = <&rst SPTIMER0_RESET>;
805 resets = <&rst SPTIMER1_RESET>;
815 resets = <&rst L4SYSTIMER0_RESET>;
825 resets = <&rst L4SYSTIMER1_RESET>;
836 resets = <&rst UART0_RESET>;
847 resets = <&rst UART1_RESET>;
863 resets = <&rst USB0_RESET>;
876 resets = <&rst USB1_RESET>;
888 resets = <&rst L4WD0_RESET>;
897 resets = <&rst L4WD1_RESET>;