Lines Matching refs:lsr
34 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine
69 add r6, r6, r9, lsr #1
71 add r6, r6, r9, lsr #2
73 add r6, r6, r9, lsr #3
74 add r6, r6, r6, lsr #8
75 add r6, r6, r6, lsr #4
78 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
82 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
94 orrne r6, r9, r6, lsr #4 @ combine nibbles } else
98 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
102 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
114 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
116 subne r7, r7, r6, lsr #20 @ Undo increment
117 addeq r7, r7, r6, lsr #20 @ Undo decrement
118 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
129 mov r9, r8, lsr #7 @ get shift count
144 mov r6, r6, lsr r9 @ 4: LSR #!0
146 mov r6, r6, lsr #32 @ 5: LSR #32
174 add pc, pc, r7, lsr #10 @ lookup in table
207 add r6, r6, r9, lsr #1
210 add r6, r6, r9, lsr #2
211 movs r7, r8, lsr #9 @ C = r8 bit 8 (R bit)
212 adc r6, r6, r6, lsr #4 @ high + low nibble + R bit
226 add r6, r6, r9, lsr #1
229 add r6, r6, r9, lsr #2
230 add r6, r6, r6, lsr #4
232 ldr r7, [r2, r9, lsr #6]
235 str r7, [r2, r9, lsr #6]