Lines Matching refs:D
77 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
80 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
132 2: mcr p15, 0, r3, c7, c14, 2 @ clean+invalidate D index
158 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
193 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
213 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
238 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
240 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
241 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
260 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
277 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
317 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
337 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
345 2: mcr p15, 0, r3, c7, c14, 2 @ clean & invalidate D index
354 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
368 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
388 mcr p15, 0, ip, c8, c7, 0 @ invalidate I+D TLBs
389 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches
402 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
405 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4