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Lines Matching refs:imm

357 	u16 imm;  in imm_offset()  local
383 imm = offset - (8 + ctx->idx * 4); in imm_offset()
385 if (imm & ~0xfff) { in imm_offset()
394 return imm; in imm_offset()
1337 const s32 imm = insn->imm; in build_insn() local
1344 #define check_imm(bits, imm) do { \ in build_insn() argument
1345 if ((imm) >= (1 << ((bits) - 1)) || \ in build_insn()
1346 (imm) < -(1 << ((bits) - 1))) { \ in build_insn()
1348 i, imm, imm); \ in build_insn()
1352 #define check_imm24(imm) check_imm(24, imm) in build_insn() argument
1364 if (imm == 1) { in build_insn()
1373 emit_a32_mov_se_i64(is64, dst, imm, ctx); in build_insn()
1422 emit_a32_mov_se_i64(is64, tmp2, imm, ctx); in build_insn()
1440 emit_a32_mov_i(rt, imm, ctx); in build_insn()
1460 if (unlikely(imm > 31)) in build_insn()
1462 if (imm) in build_insn()
1463 emit_a32_alu_i(dst_lo, imm, ctx, BPF_OP(code)); in build_insn()
1469 if (unlikely(imm > 63)) in build_insn()
1471 emit_a32_lsh_i64(dst, imm, ctx); in build_insn()
1475 if (unlikely(imm > 63)) in build_insn()
1477 emit_a32_rsh_i64(dst, imm, ctx); in build_insn()
1493 if (unlikely(imm > 63)) in build_insn()
1495 emit_a32_arsh_i64(dst, imm, ctx); in build_insn()
1521 emit_a32_mov_se_i64(is64, tmp2, imm, ctx); in build_insn()
1533 switch (imm) { in build_insn()
1548 switch (imm) { in build_insn()
1575 u64 val = (u32)imm | (u64)insn[1].imm << 32; in build_insn()
1597 emit_a32_mov_se_i64(true, tmp2, imm, ctx); in build_insn()
1602 emit_a32_mov_i(tmp2[1], imm, ctx); in build_insn()
1695 emit_a32_mov_se_i64(true, tmp2, imm, ctx); in build_insn()
1764 const u32 func = (u32)__bpf_call_base + (u32)imm; in build_insn()