27 	struct txx9_tmr_reg __iomem *tmrptr;  member
34 	return __raw_readl(&txx9_cs->tmrptr->trr);  in txx9_cs_read()
52 	return __raw_readl(&txx9_clocksource.tmrptr->trr);  in txx9_read_sched_clock()
58 	struct txx9_tmr_reg __iomem *tmrptr;  in txx9_clocksource_init()  local
62 	tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg));  in txx9_clocksource_init()
63 	__raw_writel(TCR_BASE, &tmrptr->tcr);  in txx9_clocksource_init()
64 	__raw_writel(0, &tmrptr->tisr);  in txx9_clocksource_init()
65 	__raw_writel(TIMER_CCD, &tmrptr->ccdr);  in txx9_clocksource_init()
66 	__raw_writel(TXx9_TMITMR_TZCE, &tmrptr->itmr);  in txx9_clocksource_init()
67 	__raw_writel(1 << TXX9_CLOCKSOURCE_BITS, &tmrptr->cpra);  in txx9_clocksource_init()
68 	__raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr);  in txx9_clocksource_init()
69 	txx9_clocksource.tmrptr = tmrptr;  in txx9_clocksource_init()
77 	struct txx9_tmr_reg __iomem *tmrptr;  member
80 static void txx9tmr_stop_and_clear(struct txx9_tmr_reg __iomem *tmrptr)  in txx9tmr_stop_and_clear()  argument
83 	__raw_writel(TCR_BASE, &tmrptr->tcr);  in txx9tmr_stop_and_clear()
85 	__raw_writel(0, &tmrptr->tisr);  in txx9tmr_stop_and_clear()
92 	struct txx9_tmr_reg __iomem *tmrptr = txx9_cd->tmrptr;  in txx9tmr_set_state_periodic()  local
94 	txx9tmr_stop_and_clear(tmrptr);  in txx9tmr_set_state_periodic()
96 	__raw_writel(TXx9_TMITMR_TIIE | TXx9_TMITMR_TZCE, &tmrptr->itmr);  in txx9tmr_set_state_periodic()
99 		     &tmrptr->cpra);  in txx9tmr_set_state_periodic()
100 	__raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr);  in txx9tmr_set_state_periodic()
108 	struct txx9_tmr_reg __iomem *tmrptr = txx9_cd->tmrptr;  in txx9tmr_set_state_oneshot()  local
110 	txx9tmr_stop_and_clear(tmrptr);  in txx9tmr_set_state_oneshot()
111 	__raw_writel(TXx9_TMITMR_TIIE, &tmrptr->itmr);  in txx9tmr_set_state_oneshot()
119 	struct txx9_tmr_reg __iomem *tmrptr = txx9_cd->tmrptr;  in txx9tmr_set_state_shutdown()  local
121 	txx9tmr_stop_and_clear(tmrptr);  in txx9tmr_set_state_shutdown()
122 	__raw_writel(0, &tmrptr->itmr);  in txx9tmr_set_state_shutdown()
130 	struct txx9_tmr_reg __iomem *tmrptr = txx9_cd->tmrptr;  in txx9tmr_tick_resume()  local
132 	txx9tmr_stop_and_clear(tmrptr);  in txx9tmr_tick_resume()
133 	__raw_writel(TIMER_CCD, &tmrptr->ccdr);  in txx9tmr_tick_resume()
134 	__raw_writel(0, &tmrptr->itmr);  in txx9tmr_tick_resume()
143 	struct txx9_tmr_reg __iomem *tmrptr = txx9_cd->tmrptr;  in txx9tmr_set_next_event()  local
145 	txx9tmr_stop_and_clear(tmrptr);  in txx9tmr_set_next_event()
147 	__raw_writel(delta, &tmrptr->cpra);  in txx9tmr_set_next_event()
148 	__raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr);  in txx9tmr_set_next_event()
170 	struct txx9_tmr_reg __iomem *tmrptr = txx9_cd->tmrptr;  in txx9tmr_interrupt()  local
172 	__raw_writel(0, &tmrptr->tisr); /* ack interrupt */  in txx9tmr_interrupt()
188 	struct txx9_tmr_reg __iomem *tmrptr;  in txx9_clockevent_init()  local
190 	tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg));  in txx9_clockevent_init()
191 	txx9tmr_stop_and_clear(tmrptr);  in txx9_clockevent_init()
192 	__raw_writel(TIMER_CCD, &tmrptr->ccdr);  in txx9_clockevent_init()
193 	__raw_writel(0, &tmrptr->itmr);  in txx9_clockevent_init()
194 	txx9_clock_event_device.tmrptr = tmrptr;  in txx9_clockevent_init()
212 	struct txx9_tmr_reg __iomem *tmrptr;  in txx9_tmr_init()  local
214 	tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg));  in txx9_tmr_init()
216 	__raw_writel(TXx9_TMTCR_CRE | TXx9_TMTCR_TCE, &tmrptr->tcr);  in txx9_tmr_init()
218 	__raw_writel(TXx9_TMTCR_CRE, &tmrptr->tcr);  in txx9_tmr_init()
219 	__raw_writel(0, &tmrptr->tisr);  in txx9_tmr_init()
220 	__raw_writel(0xffffffff, &tmrptr->cpra);  in txx9_tmr_init()
221 	__raw_writel(0, &tmrptr->itmr);  in txx9_tmr_init()
222 	__raw_writel(0, &tmrptr->ccdr);  in txx9_tmr_init()
223 	__raw_writel(0, &tmrptr->pgmr);  in txx9_tmr_init()
224 	iounmap(tmrptr);  in txx9_tmr_init()