71 	struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);  in bridge_disable_swapping()  local
75 	bridge_clr(bc, b_device[slot].reg, BRIDGE_DEV_SWAP_DIR);  in bridge_disable_swapping()
76 	bridge_read(bc, b_widget.w_tflush);	/* Flush */  in bridge_disable_swapping()
96 	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);  in pci_conf0_read_config()  local
97 	struct bridge_regs *bridge = bc->base;  in pci_conf0_read_config()
132 	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);  in pci_conf1_read_config()  local
133 	struct bridge_regs *bridge = bc->base;  in pci_conf1_read_config()
141 	bridge_write(bc, b_pci_cfg, (busno << 16) | (slot << 11));  in pci_conf1_read_config()
179 	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);  in pci_conf0_write_config()  local
180 	struct bridge_regs *bridge = bc->base;  in pci_conf0_write_config()
218 	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);  in pci_conf1_write_config()  local
219 	struct bridge_regs *bridge = bc->base;  in pci_conf1_write_config()
227 	bridge_write(bc, b_pci_cfg, (busno << 16) | (slot << 11));  in pci_conf1_write_config()
271 	struct bridge_controller *bc;  member
288 		bridge_write(data->bc, b_int_addr[pin].addr,  in bridge_set_affinity()
289 			     (((data->bc->intr_addr >> 30) & 0x30000) |  in bridge_set_affinity()
291 		bridge_read(data->bc, b_wid_tflush);  in bridge_set_affinity()
322 		data->bc = info->ctrl;  in bridge_domain_alloc()
349 	struct bridge_controller *bc = data->bc;  in bridge_domain_activate()  local
354 	bridge_write(bc, b_int_addr[pin].addr,  in bridge_domain_activate()
355 		     (((bc->intr_addr >> 30) & 0x30000) |  in bridge_domain_activate()
357 	bridge_set(bc, b_int_enable, (1 << pin));  in bridge_domain_activate()
358 	bridge_set(bc, b_int_enable, 0x7ffffe00); /* more stuff in int_enable */  in bridge_domain_activate()
367 	bridge_set(bc, b_int_mode, (1UL << pin));  in bridge_domain_activate()
373 	device = bridge_read(bc, b_int_device);  in bridge_domain_activate()
376 	bridge_write(bc, b_int_device, device);  in bridge_domain_activate()
378 	bridge_read(bc, b_wid_tflush);  in bridge_domain_activate()
387 	bridge_clr(data->bc, b_int_enable, (1 << irqd->hwirq));  in bridge_domain_deactivate()
388 	bridge_read(data->bc, b_wid_tflush);  in bridge_domain_deactivate()
409 	struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);  in bridge_map_irq()  local
413 	irq = bc->pci_int[slot];  in bridge_map_irq()
415 		info.ctrl = bc;  in bridge_map_irq()
416 		info.nasid = bc->nasid;  in bridge_map_irq()
419 		irq = irq_domain_alloc_irqs(bc->domain, 1, bc->nasid, &info);  in bridge_map_irq()
423 		bc->pci_int[slot] = irq;  in bridge_map_irq()
432 	struct bridge_controller *bc;  in bridge_probe()  local
453 	host = devm_pci_alloc_host_bridge(dev, sizeof(*bc));  in bridge_probe()
459 	bc = pci_host_bridge_priv(host);  in bridge_probe()
461 	bc->busn.name		= "Bridge PCI busn";  in bridge_probe()
462 	bc->busn.start		= 0;  in bridge_probe()
463 	bc->busn.end		= 0xff;  in bridge_probe()
464 	bc->busn.flags		= IORESOURCE_BUS;  in bridge_probe()
466 	bc->domain		= domain;  in bridge_probe()
470 	pci_add_resource(&host->windows, &bc->busn);  in bridge_probe()
476 	bc->nasid = bd->nasid;  in bridge_probe()
478 	bc->baddr = (u64)bd->masterwid << 60 | PCI64_ATTR_BAR;  in bridge_probe()
479 	bc->base = (struct bridge_regs *)bd->bridge_addr;  in bridge_probe()
480 	bc->intr_addr = bd->intr_addr;  in bridge_probe()
485 	bridge_write(bc, b_int_rst_stat, BRIDGE_IRR_ALL_CLR);  in bridge_probe()
490 	bridge_write(bc, b_int_device, 0x0);  in bridge_probe()
495 	bridge_clr(bc, b_wid_control,  in bridge_probe()
498 	bridge_clr(bc, b_wid_control, BRIDGE_CTRL_PAGE_SIZE);  in bridge_probe()
500 	bridge_set(bc, b_wid_control, BRIDGE_CTRL_PAGE_SIZE);  in bridge_probe()
507 	bridge_write(bc, b_wid_int_upper,  in bridge_probe()
508 		     ((bc->intr_addr >> 32) & 0xffff) | (bd->masterwid << 16));  in bridge_probe()
509 	bridge_write(bc, b_wid_int_lower, bc->intr_addr & 0xffffffff);  in bridge_probe()
510 	bridge_write(bc, b_dir_map, (bd->masterwid << 20));	/* DMA */  in bridge_probe()
511 	bridge_write(bc, b_int_enable, 0);  in bridge_probe()
514 		bridge_set(bc, b_device[slot].reg, BRIDGE_DEV_SWAP_DIR);  in bridge_probe()
515 		bc->pci_int[slot] = -1;  in bridge_probe()
517 	bridge_read(bc, b_wid_tflush);	  /* wait until Bridge PIO complete */  in bridge_probe()
520 	host->sysdata = bc;  in bridge_probe()
547 	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);  in bridge_remove()  local
549 	irq_domain_remove(bc->domain);  in bridge_remove()