279 #define __EVENT_CONSTRAINT_RANGE(c, e, n, m, w, o, f) {	\  argument
280 	{ .idxmsk64 = (n) },		\
289 #define __EVENT_CONSTRAINT(c, n, m, w, o, f) \  argument
290 	__EVENT_CONSTRAINT_RANGE(c, c, n, m, w, o, f)
292 #define EVENT_CONSTRAINT(c, n, m)	\  argument
293 	__EVENT_CONSTRAINT(c, n, m, HWEIGHT(n), 0, 0)
299 #define EVENT_CONSTRAINT_RANGE(c, e, n, m) \  argument
300 	__EVENT_CONSTRAINT_RANGE(c, e, n, m, HWEIGHT(n), 0, 0)
302 #define INTEL_EXCLEVT_CONSTRAINT(c, n)	\  argument
303 	__EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT, HWEIGHT(n),\
327 #define EVENT_CONSTRAINT_OVERLAP(c, n, m)	\  argument
328 	__EVENT_CONSTRAINT(c, n, m, HWEIGHT(n), 1, 0)
333 #define INTEL_EVENT_CONSTRAINT(c, n)	\  argument
334 	EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT)
339 #define INTEL_EVENT_CONSTRAINT_RANGE(c, e, n)			\  argument
340 	EVENT_CONSTRAINT_RANGE(c, e, n, ARCH_PERFMON_EVENTSEL_EVENT)
356 #define FIXED_EVENT_CONSTRAINT(c, n)	\  argument
357 	EVENT_CONSTRAINT(c, (1ULL << (32+n)), FIXED_EVENT_FLAGS)
362 #define INTEL_UEVENT_CONSTRAINT(c, n)	\  argument
363 	EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
366 #define INTEL_UBIT_EVENT_CONSTRAINT(c, n)	\  argument
367 	EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT|(c))
370 #define INTEL_FLAGS_UEVENT_CONSTRAINT(c, n)	\  argument
371 	EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS)
373 #define INTEL_EXCLUEVT_CONSTRAINT(c, n)	\  argument
374 	__EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \
375 			   HWEIGHT(n), 0, PERF_X86_EVENT_EXCL)
377 #define INTEL_PLD_CONSTRAINT(c, n)	\  argument
378 	__EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
379 			   HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_LDLAT)
381 #define INTEL_PST_CONSTRAINT(c, n)	\  argument
382 	__EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
383 			  HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_ST)
386 #define INTEL_FLAGS_EVENT_CONSTRAINT(c, n) \  argument
387 	EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT|X86_ALL_EVENT_FLAGS)
389 #define INTEL_FLAGS_EVENT_CONSTRAINT_RANGE(c, e, n)			\  argument
390 	EVENT_CONSTRAINT_RANGE(c, e, n, ARCH_PERFMON_EVENTSEL_EVENT|X86_ALL_EVENT_FLAGS)
393 #define INTEL_ALL_EVENT_CONSTRAINT(code, n)	\  argument
394 	EVENT_CONSTRAINT(code, n, X86_ALL_EVENT_FLAGS)
397 #define INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_ST(code, n) \  argument
398 	__EVENT_CONSTRAINT(code, n, 			\
400 			  HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_ST_HSW)
403 #define INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_LD(code, n) \  argument
404 	__EVENT_CONSTRAINT(code, n,			\
406 			  HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_LD_HSW)
408 #define INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_LD_RANGE(code, end, n) \  argument
409 	__EVENT_CONSTRAINT_RANGE(code, end, n,				\
411 			  HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_LD_HSW)
413 #define INTEL_FLAGS_EVENT_CONSTRAINT_DATALA_XLD(code, n) \  argument
414 	__EVENT_CONSTRAINT(code, n,			\
416 			  HWEIGHT(n), 0, \
420 #define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_ST(code, n) \  argument
421 	__EVENT_CONSTRAINT(code, n, 			\
423 			  HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_ST_HSW)
425 #define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XST(code, n) \  argument
426 	__EVENT_CONSTRAINT(code, n,			\
428 			  HWEIGHT(n), 0, \
432 #define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_LD(code, n) \  argument
433 	__EVENT_CONSTRAINT(code, n, 			\
435 			  HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_LD_HSW)
437 #define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_XLD(code, n) \  argument
438 	__EVENT_CONSTRAINT(code, n,			\
440 			  HWEIGHT(n), 0, \
444 #define INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_NA(code, n) \  argument
445 	__EVENT_CONSTRAINT(code, n, 			\
447 			  HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_NA_HSW)
580 	int		(*schedule_events)(struct cpu_hw_events *cpuc, int n, int *assign);
845 int perf_assign_events(struct event_constraint **constraints, int n,
847 int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign);