53 		struct rdt_resource *r);
55 cat_wrmsr(struct rdt_domain *d, struct msr_param *m, struct rdt_resource *r);
58 	      struct rdt_resource *r);
176 static unsigned int cbm_idx(struct rdt_resource *r, unsigned int closid)  in cbm_idx()  argument
178 	return closid * r->cache.cbm_idx_mult + r->cache.cbm_idx_offset;  in cbm_idx()
201 	struct rdt_resource *r  = &rdt_resources_all[RDT_RESOURCE_L3];  in cache_alloc_hsw_probe()  local
213 	r->num_closid = 4;  in cache_alloc_hsw_probe()
214 	r->default_ctrl = max_cbm;  in cache_alloc_hsw_probe()
215 	r->cache.cbm_len = 20;  in cache_alloc_hsw_probe()
216 	r->cache.shareable_bits = 0xc0000;  in cache_alloc_hsw_probe()
217 	r->cache.min_cbm_bits = 2;  in cache_alloc_hsw_probe()
218 	r->alloc_capable = true;  in cache_alloc_hsw_probe()
219 	r->alloc_enabled = true;  in cache_alloc_hsw_probe()
224 bool is_mba_sc(struct rdt_resource *r)  in is_mba_sc()  argument
226 	if (!r)  in is_mba_sc()
229 	return r->membw.mba_sc;  in is_mba_sc()
242 static inline bool rdt_get_mb_table(struct rdt_resource *r)  in rdt_get_mb_table()  argument
253 static bool __get_mem_config_intel(struct rdt_resource *r)  in __get_mem_config_intel()  argument
260 	r->num_closid = edx.split.cos_max + 1;  in __get_mem_config_intel()
261 	r->membw.max_delay = eax.split.max_delay + 1;  in __get_mem_config_intel()
262 	r->default_ctrl = MAX_MBA_BW;  in __get_mem_config_intel()
264 		r->membw.delay_linear = true;  in __get_mem_config_intel()
265 		r->membw.min_bw = MAX_MBA_BW - r->membw.max_delay;  in __get_mem_config_intel()
266 		r->membw.bw_gran = MAX_MBA_BW - r->membw.max_delay;  in __get_mem_config_intel()
268 		if (!rdt_get_mb_table(r))  in __get_mem_config_intel()
271 	r->data_width = 3;  in __get_mem_config_intel()
273 	r->alloc_capable = true;  in __get_mem_config_intel()
274 	r->alloc_enabled = true;  in __get_mem_config_intel()
279 static bool __rdt_get_mem_config_amd(struct rdt_resource *r)  in __rdt_get_mem_config_amd()  argument
286 	r->num_closid = edx.split.cos_max + 1;  in __rdt_get_mem_config_amd()
287 	r->default_ctrl = MAX_MBA_BW_AMD;  in __rdt_get_mem_config_amd()
290 	r->membw.delay_linear = false;  in __rdt_get_mem_config_amd()
292 	r->membw.min_bw = 0;  in __rdt_get_mem_config_amd()
293 	r->membw.bw_gran = 1;  in __rdt_get_mem_config_amd()
295 	r->data_width = 4;  in __rdt_get_mem_config_amd()
297 	r->alloc_capable = true;  in __rdt_get_mem_config_amd()
298 	r->alloc_enabled = true;  in __rdt_get_mem_config_amd()
303 static void rdt_get_cache_alloc_cfg(int idx, struct rdt_resource *r)  in rdt_get_cache_alloc_cfg()  argument
310 	r->num_closid = edx.split.cos_max + 1;  in rdt_get_cache_alloc_cfg()
311 	r->cache.cbm_len = eax.split.cbm_len + 1;  in rdt_get_cache_alloc_cfg()
312 	r->default_ctrl = BIT_MASK(eax.split.cbm_len + 1) - 1;  in rdt_get_cache_alloc_cfg()
313 	r->cache.shareable_bits = ebx & r->default_ctrl;  in rdt_get_cache_alloc_cfg()
314 	r->data_width = (r->cache.cbm_len + 3) / 4;  in rdt_get_cache_alloc_cfg()
315 	r->alloc_capable = true;  in rdt_get_cache_alloc_cfg()
316 	r->alloc_enabled = true;  in rdt_get_cache_alloc_cfg()
322 	struct rdt_resource *r = &rdt_resources_all[type];  in rdt_get_cdp_config()  local
324 	r->num_closid = r_l->num_closid / 2;  in rdt_get_cdp_config()
325 	r->cache.cbm_len = r_l->cache.cbm_len;  in rdt_get_cdp_config()
326 	r->default_ctrl = r_l->default_ctrl;  in rdt_get_cdp_config()
327 	r->cache.shareable_bits = r_l->cache.shareable_bits;  in rdt_get_cdp_config()
328 	r->data_width = (r->cache.cbm_len + 3) / 4;  in rdt_get_cdp_config()
329 	r->alloc_capable = true;  in rdt_get_cdp_config()
334 	r->alloc_enabled = false;  in rdt_get_cdp_config()
363 mba_wrmsr_amd(struct rdt_domain *d, struct msr_param *m, struct rdt_resource *r)  in mba_wrmsr_amd()  argument
368 		wrmsrl(r->msr_base + i, d->ctrl_val[i]);  in mba_wrmsr_amd()
376 u32 delay_bw_map(unsigned long bw, struct rdt_resource *r)  in delay_bw_map()  argument
378 	if (r->membw.delay_linear)  in delay_bw_map()
382 	return r->default_ctrl;  in delay_bw_map()
387 		struct rdt_resource *r)  in mba_wrmsr_intel()  argument
393 		wrmsrl(r->msr_base + i, delay_bw_map(d->ctrl_val[i], r));  in mba_wrmsr_intel()
397 cat_wrmsr(struct rdt_domain *d, struct msr_param *m, struct rdt_resource *r)  in cat_wrmsr()  argument
402 		wrmsrl(r->msr_base + cbm_idx(r, i), d->ctrl_val[i]);  in cat_wrmsr()
405 struct rdt_domain *get_domain_from_cpu(int cpu, struct rdt_resource *r)  in get_domain_from_cpu()  argument
409 	list_for_each_entry(d, &r->domains, list) {  in get_domain_from_cpu()
421 	struct rdt_resource *r = m->res;  in rdt_ctrl_update()  local
425 	d = get_domain_from_cpu(cpu, r);  in rdt_ctrl_update()
427 		r->msr_update(d, m, r);  in rdt_ctrl_update()
431 		     cpu, r->name);  in rdt_ctrl_update()
442 struct rdt_domain *rdt_find_domain(struct rdt_resource *r, int id,  in rdt_find_domain()  argument
451 	list_for_each(l, &r->domains) {  in rdt_find_domain()
467 void setup_default_ctrlval(struct rdt_resource *r, u32 *dc, u32 *dm)  in setup_default_ctrlval()  argument
477 	for (i = 0; i < r->num_closid; i++, dc++, dm++) {  in setup_default_ctrlval()
478 		*dc = r->default_ctrl;  in setup_default_ctrlval()
483 static int domain_setup_ctrlval(struct rdt_resource *r, struct rdt_domain *d)  in domain_setup_ctrlval()  argument
488 	dc = kmalloc_array(r->num_closid, sizeof(*d->ctrl_val), GFP_KERNEL);  in domain_setup_ctrlval()
492 	dm = kmalloc_array(r->num_closid, sizeof(*d->mbps_val), GFP_KERNEL);  in domain_setup_ctrlval()
500 	setup_default_ctrlval(r, dc, dm);  in domain_setup_ctrlval()
503 	m.high = r->num_closid;  in domain_setup_ctrlval()
504 	r->msr_update(d, &m, r);  in domain_setup_ctrlval()
508 static int domain_setup_mon_state(struct rdt_resource *r, struct rdt_domain *d)  in domain_setup_mon_state()  argument
513 		d->rmid_busy_llc = bitmap_zalloc(r->num_rmid, GFP_KERNEL);  in domain_setup_mon_state()
520 		d->mbm_total = kcalloc(r->num_rmid, tsize, GFP_KERNEL);  in domain_setup_mon_state()
528 		d->mbm_local = kcalloc(r->num_rmid, tsize, GFP_KERNEL);  in domain_setup_mon_state()
557 static void domain_add_cpu(int cpu, struct rdt_resource *r)  in domain_add_cpu()  argument
559 	int id = get_cache_id(cpu, r->cache_level);  in domain_add_cpu()
563 	d = rdt_find_domain(r, id, &add_pos);  in domain_add_cpu()
581 	if (r->alloc_capable && domain_setup_ctrlval(r, d)) {  in domain_add_cpu()
586 	if (r->mon_capable && domain_setup_mon_state(r, d)) {  in domain_add_cpu()
598 		mkdir_mondata_subdir_allrdtgrp(r, d);  in domain_add_cpu()
601 static void domain_remove_cpu(int cpu, struct rdt_resource *r)  in domain_remove_cpu()  argument
603 	int id = get_cache_id(cpu, r->cache_level);  in domain_remove_cpu()
606 	d = rdt_find_domain(r, id, NULL);  in domain_remove_cpu()
619 			rmdir_mondata_subdir_allrdtgrp(r, d->id);  in domain_remove_cpu()
621 		if (r->mon_capable && is_mbm_enabled())  in domain_remove_cpu()
623 		if (is_llc_occupancy_enabled() &&  has_busy_rmid(r, d)) {  in domain_remove_cpu()
652 	if (r == &rdt_resources_all[RDT_RESOURCE_L3]) {  in domain_remove_cpu()
658 		    has_busy_rmid(r, d)) {  in domain_remove_cpu()
678 	struct rdt_resource *r;  in resctrl_online_cpu()  local
681 	for_each_capable_rdt_resource(r)  in resctrl_online_cpu()
682 		domain_add_cpu(cpu, r);  in resctrl_online_cpu()
691 static void clear_childcpus(struct rdtgroup *r, unsigned int cpu)  in clear_childcpus()  argument
695 	list_for_each_entry(cr, &r->mon.crdtgrp_list, mon.crdtgrp_list) {  in clear_childcpus()
705 	struct rdt_resource *r;  in resctrl_offline_cpu()  local
708 	for_each_capable_rdt_resource(r)  in resctrl_offline_cpu()
709 		domain_remove_cpu(cpu, r);  in resctrl_offline_cpu()
728 	struct rdt_resource *r;  in rdt_init_padding()  local
731 	for_each_alloc_capable_rdt_resource(r) {  in rdt_init_padding()
732 		cl = strlen(r->name);  in rdt_init_padding()
736 		if (r->data_width > max_data_width)  in rdt_init_padding()
737 			max_data_width = r->data_width;  in rdt_init_padding()
911 	struct rdt_resource *r;  in rdt_init_res_defs_intel()  local
913 	for_each_rdt_resource(r) {  in rdt_init_res_defs_intel()
914 		if (r->rid == RDT_RESOURCE_L3 ||  in rdt_init_res_defs_intel()
915 		    r->rid == RDT_RESOURCE_L3DATA ||  in rdt_init_res_defs_intel()
916 		    r->rid == RDT_RESOURCE_L3CODE ||  in rdt_init_res_defs_intel()
917 		    r->rid == RDT_RESOURCE_L2 ||  in rdt_init_res_defs_intel()
918 		    r->rid == RDT_RESOURCE_L2DATA ||  in rdt_init_res_defs_intel()
919 		    r->rid == RDT_RESOURCE_L2CODE)  in rdt_init_res_defs_intel()
920 			r->cbm_validate = cbm_validate_intel;  in rdt_init_res_defs_intel()
921 		else if (r->rid == RDT_RESOURCE_MBA) {  in rdt_init_res_defs_intel()
922 			r->msr_base = MSR_IA32_MBA_THRTL_BASE;  in rdt_init_res_defs_intel()
923 			r->msr_update = mba_wrmsr_intel;  in rdt_init_res_defs_intel()
924 			r->parse_ctrlval = parse_bw_intel;  in rdt_init_res_defs_intel()
931 	struct rdt_resource *r;  in rdt_init_res_defs_amd()  local
933 	for_each_rdt_resource(r) {  in rdt_init_res_defs_amd()
934 		if (r->rid == RDT_RESOURCE_L3 ||  in rdt_init_res_defs_amd()
935 		    r->rid == RDT_RESOURCE_L3DATA ||  in rdt_init_res_defs_amd()
936 		    r->rid == RDT_RESOURCE_L3CODE ||  in rdt_init_res_defs_amd()
937 		    r->rid == RDT_RESOURCE_L2 ||  in rdt_init_res_defs_amd()
938 		    r->rid == RDT_RESOURCE_L2DATA ||  in rdt_init_res_defs_amd()
939 		    r->rid == RDT_RESOURCE_L2CODE)  in rdt_init_res_defs_amd()
940 			r->cbm_validate = cbm_validate_amd;  in rdt_init_res_defs_amd()
941 		else if (r->rid == RDT_RESOURCE_MBA) {  in rdt_init_res_defs_amd()
942 			r->msr_base = MSR_IA32_MBA_BW_BASE;  in rdt_init_res_defs_amd()
943 			r->msr_update = mba_wrmsr_amd;  in rdt_init_res_defs_amd()
944 			r->parse_ctrlval = parse_bw_amd;  in rdt_init_res_defs_amd()
961 	struct rdt_resource *r;  in resctrl_late_init()  local
990 	for_each_alloc_capable_rdt_resource(r)  in resctrl_late_init()
991 		pr_info("%s allocation detected\n", r->name);  in resctrl_late_init()
993 	for_each_mon_capable_rdt_resource(r)  in resctrl_late_init()
994 		pr_info("%s monitoring detected\n", r->name);  in resctrl_late_init()