2004 	int reg = VCPU_REGS_RAX;  in em_pusha()
2032 	while (reg >= VCPU_REGS_RAX) {  in em_popa()
2242 	if (((u32) (old >> 0) != (u32) reg_read(ctxt, VCPU_REGS_RAX)) ||  in em_cmpxchg8b()
2244 		*reg_write(ctxt, VCPU_REGS_RAX) = (u32) (old >> 0);  in em_cmpxchg8b()
2312 	ctxt->dst.val = reg_read(ctxt, VCPU_REGS_RAX);  in em_cmpxchg()
2324 		ctxt->src.addr.reg = reg_rmw(ctxt, VCPU_REGS_RAX);  in em_cmpxchg()
3026 	tss->ax = reg_read(ctxt, VCPU_REGS_RAX);  in save_state_to_tss16()
3050 	*reg_write(ctxt, VCPU_REGS_RAX) = tss->ax;  in load_state_from_tss16()
3140 	tss->eax = reg_read(ctxt, VCPU_REGS_RAX);  in save_state_to_tss32()
3169 	*reg_write(ctxt, VCPU_REGS_RAX) = tss->eax;  in load_state_from_tss32()
3601 	*reg_write(ctxt, VCPU_REGS_RAX) = (u32)tsc;  in em_rdtsc()
3612 	*reg_write(ctxt, VCPU_REGS_RAX) = (u32)pmc;  in em_rdpmc()
3695 	msr_data = (u32)reg_read(ctxt, VCPU_REGS_RAX)  in em_wrmsr()
3710 	*reg_write(ctxt, VCPU_REGS_RAX) = (u32)msr_data;  in em_rdmsr()
3973 	eax = reg_read(ctxt, VCPU_REGS_RAX);  in em_cpuid()
3976 	*reg_write(ctxt, VCPU_REGS_RAX) = eax;  in em_cpuid()
3989 	flags &= *reg_rmw(ctxt, VCPU_REGS_RAX) >> 8;  in em_sahf()
3998 	*reg_rmw(ctxt, VCPU_REGS_RAX) &= ~0xff00UL;  in em_lahf()
3999 	*reg_rmw(ctxt, VCPU_REGS_RAX) |= (ctxt->eflags & 0xff) << 8;  in em_lahf()
4163 	eax = reg_read(ctxt, VCPU_REGS_RAX);  in em_xsetbv()
4327 	u64 rax = reg_read(ctxt, VCPU_REGS_RAX);  in check_svme_pa()
5007 		op->addr.reg = reg_rmw(ctxt, VCPU_REGS_RAX);  in decode_operand()
5014 		op->addr.reg = reg_rmw(ctxt, VCPU_REGS_RAX);  in decode_operand()
5098 				(reg_read(ctxt, VCPU_REGS_RAX) & 0xff));  in decode_operand()
5673 		if (ctxt->dst.addr.reg == reg_rmw(ctxt, VCPU_REGS_RAX))  in x86_emulate_insn()