Lines Matching refs:divider_reg
430 void __iomem *divider_reg; /* CSR for divider */ member
539 if (pclk->param.divider_reg) { in xgene_clk_recalc_rate()
540 data = xgene_clk_read(pclk->param.divider_reg + in xgene_clk_recalc_rate()
569 if (pclk->param.divider_reg) { in xgene_clk_set_rate()
578 data = xgene_clk_read(pclk->param.divider_reg + in xgene_clk_set_rate()
583 xgene_clk_write(data, pclk->param.divider_reg + in xgene_clk_set_rate()
604 if (pclk->param.divider_reg) { in xgene_clk_round_rate()
681 parameters.divider_reg = NULL; in xgene_devclk_init()
698 parameters.divider_reg = map_res; in xgene_devclk_init()
736 if (parameters.divider_reg) in xgene_devclk_init()
737 iounmap(parameters.divider_reg); in xgene_devclk_init()