Lines Matching refs:CGU_CLK_MUX
276 "sclk_a", CGU_CLK_MUX,
283 "cpumux", CGU_CLK_MUX,
302 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
310 "ahb2_apb_mux", CGU_CLK_MUX,
329 "ddr", CGU_CLK_MUX | CGU_CLK_DIV,
336 "vpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
345 "i2s_pll", CGU_CLK_MUX | CGU_CLK_DIV,
352 "i2s", CGU_CLK_MUX,
358 "lcd0pixclk", CGU_CLK_MUX | CGU_CLK_DIV,
366 "lcd1pixclk", CGU_CLK_MUX | CGU_CLK_DIV,
374 "msc_mux", CGU_CLK_MUX,
401 "uhc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
410 "ssi_pll", CGU_CLK_MUX | CGU_CLK_DIV,
417 "ssi", CGU_CLK_MUX,
423 "cim_mclk", CGU_CLK_MUX | CGU_CLK_DIV,
430 "pcm_pll", CGU_CLK_MUX | CGU_CLK_DIV,
438 "pcm", CGU_CLK_MUX | CGU_CLK_GATE,
445 "gpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
454 "hdmi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
463 "bch", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,