Lines Matching refs:con0
439 u32 con0, con1; in samsung_pll45xx_set_rate() local
450 con0 = readl_relaxed(pll->con_reg); in samsung_pll45xx_set_rate()
453 if (!(samsung_pll45xx_mp_change(con0, con1, rate))) { in samsung_pll45xx_set_rate()
455 con0 &= ~(PLL45XX_SDIV_MASK << PLL45XX_SDIV_SHIFT); in samsung_pll45xx_set_rate()
456 con0 |= rate->sdiv << PLL45XX_SDIV_SHIFT; in samsung_pll45xx_set_rate()
457 writel_relaxed(con0, pll->con_reg); in samsung_pll45xx_set_rate()
463 con0 &= ~((PLL45XX_MDIV_MASK << PLL45XX_MDIV_SHIFT) | in samsung_pll45xx_set_rate()
466 con0 |= (rate->mdiv << PLL45XX_MDIV_SHIFT) | in samsung_pll45xx_set_rate()
489 writel_relaxed(con0, pll->con_reg); in samsung_pll45xx_set_rate()
590 u32 con0, con1, lock; in samsung_pll46xx_set_rate() local
601 con0 = readl_relaxed(pll->con_reg); in samsung_pll46xx_set_rate()
604 if (!(samsung_pll46xx_mpk_change(con0, con1, rate))) { in samsung_pll46xx_set_rate()
606 con0 &= ~(PLL46XX_SDIV_MASK << PLL46XX_SDIV_SHIFT); in samsung_pll46xx_set_rate()
607 con0 |= rate->sdiv << PLL46XX_SDIV_SHIFT; in samsung_pll46xx_set_rate()
608 writel_relaxed(con0, pll->con_reg); in samsung_pll46xx_set_rate()
621 con0 &= ~((PLL1460X_MDIV_MASK << PLL46XX_MDIV_SHIFT) | in samsung_pll46xx_set_rate()
625 con0 &= ~((PLL46XX_MDIV_MASK << PLL46XX_MDIV_SHIFT) | in samsung_pll46xx_set_rate()
629 con0 |= rate->vsel << PLL46XX_VSEL_SHIFT; in samsung_pll46xx_set_rate()
632 con0 |= (rate->mdiv << PLL46XX_MDIV_SHIFT) | in samsung_pll46xx_set_rate()
647 writel_relaxed(con0, pll->con_reg); in samsung_pll46xx_set_rate()
1105 u32 con0, con1; in samsung_pll2650x_set_rate() local
1115 con0 = readl_relaxed(pll->con_reg); in samsung_pll2650x_set_rate()
1122 con0 &= ~((PLL2650X_M_MASK << PLL2650X_M_SHIFT) | in samsung_pll2650x_set_rate()
1125 con0 |= (rate->mdiv << PLL2650X_M_SHIFT) | in samsung_pll2650x_set_rate()
1128 con0 |= (1 << PLL2650X_PLL_ENABLE_SHIFT); in samsung_pll2650x_set_rate()
1129 writel_relaxed(con0, pll->con_reg); in samsung_pll2650x_set_rate()
1137 con0 = readl_relaxed(pll->con_reg); in samsung_pll2650x_set_rate()
1138 } while (!(con0 & (PLL2650X_LOCK_STAT_MASK in samsung_pll2650x_set_rate()