Lines Matching refs:mvchip
102 struct mvebu_gpio_chip *mvchip; member
137 static void mvebu_gpioreg_edge_cause(struct mvebu_gpio_chip *mvchip, in mvebu_gpioreg_edge_cause() argument
142 switch (mvchip->soc_variant) { in mvebu_gpioreg_edge_cause()
146 *map = mvchip->regs; in mvebu_gpioreg_edge_cause()
147 *offset = GPIO_EDGE_CAUSE_OFF + mvchip->offset; in mvebu_gpioreg_edge_cause()
151 *map = mvchip->percpu_regs; in mvebu_gpioreg_edge_cause()
160 mvebu_gpio_read_edge_cause(struct mvebu_gpio_chip *mvchip) in mvebu_gpio_read_edge_cause() argument
166 mvebu_gpioreg_edge_cause(mvchip, &map, &offset); in mvebu_gpio_read_edge_cause()
173 mvebu_gpio_write_edge_cause(struct mvebu_gpio_chip *mvchip, u32 val) in mvebu_gpio_write_edge_cause() argument
178 mvebu_gpioreg_edge_cause(mvchip, &map, &offset); in mvebu_gpio_write_edge_cause()
183 mvebu_gpioreg_edge_mask(struct mvebu_gpio_chip *mvchip, in mvebu_gpioreg_edge_mask() argument
188 switch (mvchip->soc_variant) { in mvebu_gpioreg_edge_mask()
191 *map = mvchip->regs; in mvebu_gpioreg_edge_mask()
192 *offset = GPIO_EDGE_MASK_OFF + mvchip->offset; in mvebu_gpioreg_edge_mask()
196 *map = mvchip->regs; in mvebu_gpioreg_edge_mask()
201 *map = mvchip->percpu_regs; in mvebu_gpioreg_edge_mask()
210 mvebu_gpio_read_edge_mask(struct mvebu_gpio_chip *mvchip) in mvebu_gpio_read_edge_mask() argument
216 mvebu_gpioreg_edge_mask(mvchip, &map, &offset); in mvebu_gpio_read_edge_mask()
223 mvebu_gpio_write_edge_mask(struct mvebu_gpio_chip *mvchip, u32 val) in mvebu_gpio_write_edge_mask() argument
228 mvebu_gpioreg_edge_mask(mvchip, &map, &offset); in mvebu_gpio_write_edge_mask()
233 mvebu_gpioreg_level_mask(struct mvebu_gpio_chip *mvchip, in mvebu_gpioreg_level_mask() argument
238 switch (mvchip->soc_variant) { in mvebu_gpioreg_level_mask()
241 *map = mvchip->regs; in mvebu_gpioreg_level_mask()
242 *offset = GPIO_LEVEL_MASK_OFF + mvchip->offset; in mvebu_gpioreg_level_mask()
246 *map = mvchip->regs; in mvebu_gpioreg_level_mask()
251 *map = mvchip->percpu_regs; in mvebu_gpioreg_level_mask()
260 mvebu_gpio_read_level_mask(struct mvebu_gpio_chip *mvchip) in mvebu_gpio_read_level_mask() argument
266 mvebu_gpioreg_level_mask(mvchip, &map, &offset); in mvebu_gpio_read_level_mask()
273 mvebu_gpio_write_level_mask(struct mvebu_gpio_chip *mvchip, u32 val) in mvebu_gpio_write_level_mask() argument
278 mvebu_gpioreg_level_mask(mvchip, &map, &offset); in mvebu_gpio_write_level_mask()
301 struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); in mvebu_gpio_set() local
303 regmap_update_bits(mvchip->regs, GPIO_OUT_OFF + mvchip->offset, in mvebu_gpio_set()
309 struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); in mvebu_gpio_get() local
312 regmap_read(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, &u); in mvebu_gpio_get()
317 regmap_read(mvchip->regs, GPIO_DATA_IN_OFF + mvchip->offset, in mvebu_gpio_get()
319 regmap_read(mvchip->regs, GPIO_IN_POL_OFF + mvchip->offset, in mvebu_gpio_get()
323 regmap_read(mvchip->regs, GPIO_OUT_OFF + mvchip->offset, &u); in mvebu_gpio_get()
332 struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); in mvebu_gpio_blink() local
334 regmap_update_bits(mvchip->regs, GPIO_BLINK_EN_OFF + mvchip->offset, in mvebu_gpio_blink()
340 struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); in mvebu_gpio_direction_input() local
351 regmap_update_bits(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, in mvebu_gpio_direction_input()
360 struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); in mvebu_gpio_direction_output() local
374 regmap_update_bits(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, in mvebu_gpio_direction_output()
382 struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); in mvebu_gpio_get_direction() local
385 regmap_read(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, &u); in mvebu_gpio_get_direction()
392 struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); in mvebu_gpio_to_irq() local
394 return irq_create_mapping(mvchip->domain, pin); in mvebu_gpio_to_irq()
403 struct mvebu_gpio_chip *mvchip = gc->private; in mvebu_gpio_irq_ack() local
407 mvebu_gpio_write_edge_cause(mvchip, ~mask); in mvebu_gpio_irq_ack()
414 struct mvebu_gpio_chip *mvchip = gc->private; in mvebu_gpio_edge_irq_mask() local
420 mvebu_gpio_write_edge_mask(mvchip, ct->mask_cache_priv); in mvebu_gpio_edge_irq_mask()
427 struct mvebu_gpio_chip *mvchip = gc->private; in mvebu_gpio_edge_irq_unmask() local
433 mvebu_gpio_write_edge_mask(mvchip, ct->mask_cache_priv); in mvebu_gpio_edge_irq_unmask()
440 struct mvebu_gpio_chip *mvchip = gc->private; in mvebu_gpio_level_irq_mask() local
446 mvebu_gpio_write_level_mask(mvchip, ct->mask_cache_priv); in mvebu_gpio_level_irq_mask()
453 struct mvebu_gpio_chip *mvchip = gc->private; in mvebu_gpio_level_irq_unmask() local
459 mvebu_gpio_write_level_mask(mvchip, ct->mask_cache_priv); in mvebu_gpio_level_irq_unmask()
493 struct mvebu_gpio_chip *mvchip = gc->private; in mvebu_gpio_irq_set_type() local
499 regmap_read(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, &u); in mvebu_gpio_irq_set_type()
518 regmap_update_bits(mvchip->regs, in mvebu_gpio_irq_set_type()
519 GPIO_IN_POL_OFF + mvchip->offset, in mvebu_gpio_irq_set_type()
524 regmap_update_bits(mvchip->regs, in mvebu_gpio_irq_set_type()
525 GPIO_IN_POL_OFF + mvchip->offset, in mvebu_gpio_irq_set_type()
531 regmap_read(mvchip->regs, in mvebu_gpio_irq_set_type()
532 GPIO_IN_POL_OFF + mvchip->offset, &in_pol); in mvebu_gpio_irq_set_type()
533 regmap_read(mvchip->regs, in mvebu_gpio_irq_set_type()
534 GPIO_DATA_IN_OFF + mvchip->offset, &data_in); in mvebu_gpio_irq_set_type()
544 regmap_update_bits(mvchip->regs, in mvebu_gpio_irq_set_type()
545 GPIO_IN_POL_OFF + mvchip->offset, in mvebu_gpio_irq_set_type()
555 struct mvebu_gpio_chip *mvchip = irq_desc_get_handler_data(desc); in mvebu_gpio_irq_handler() local
560 if (mvchip == NULL) in mvebu_gpio_irq_handler()
565 regmap_read(mvchip->regs, GPIO_DATA_IN_OFF + mvchip->offset, &data_in); in mvebu_gpio_irq_handler()
566 level_mask = mvebu_gpio_read_level_mask(mvchip); in mvebu_gpio_irq_handler()
567 edge_cause = mvebu_gpio_read_edge_cause(mvchip); in mvebu_gpio_irq_handler()
568 edge_mask = mvebu_gpio_read_edge_mask(mvchip); in mvebu_gpio_irq_handler()
572 for (i = 0; i < mvchip->chip.ngpio; i++) { in mvebu_gpio_irq_handler()
575 irq = irq_find_mapping(mvchip->domain, i); in mvebu_gpio_irq_handler()
585 regmap_read(mvchip->regs, in mvebu_gpio_irq_handler()
586 GPIO_IN_POL_OFF + mvchip->offset, in mvebu_gpio_irq_handler()
589 regmap_write(mvchip->regs, in mvebu_gpio_irq_handler()
590 GPIO_IN_POL_OFF + mvchip->offset, in mvebu_gpio_irq_handler()
611 struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; in mvebu_pwm_request() local
621 desc = gpiochip_request_own_desc(&mvchip->chip, in mvebu_pwm_request()
653 struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; in mvebu_pwm_get_state() local
687 regmap_read(mvchip->regs, GPIO_BLINK_EN_OFF + mvchip->offset, &u); in mvebu_pwm_get_state()
700 struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; in mvebu_pwm_apply() local
729 mvebu_gpio_blink(&mvchip->chip, pwm->hwpwm, 1); in mvebu_pwm_apply()
731 mvebu_gpio_blink(&mvchip->chip, pwm->hwpwm, 0); in mvebu_pwm_apply()
746 static void __maybe_unused mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) in mvebu_pwm_suspend() argument
748 struct mvebu_pwm *mvpwm = mvchip->mvpwm; in mvebu_pwm_suspend()
750 regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, in mvebu_pwm_suspend()
758 static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) in mvebu_pwm_resume() argument
760 struct mvebu_pwm *mvpwm = mvchip->mvpwm; in mvebu_pwm_resume()
762 regmap_write(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, in mvebu_pwm_resume()
771 struct mvebu_gpio_chip *mvchip, in mvebu_pwm_probe() argument
779 if (!of_device_is_compatible(mvchip->chip.of_node, in mvebu_pwm_probe()
793 if (IS_ERR(mvchip->clk)) in mvebu_pwm_probe()
794 return PTR_ERR(mvchip->clk); in mvebu_pwm_probe()
806 regmap_write(mvchip->regs, in mvebu_pwm_probe()
807 GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set); in mvebu_pwm_probe()
812 mvchip->mvpwm = mvpwm; in mvebu_pwm_probe()
813 mvpwm->mvchip = mvchip; in mvebu_pwm_probe()
819 mvpwm->clk_rate = clk_get_rate(mvchip->clk); in mvebu_pwm_probe()
827 mvpwm->chip.npwm = mvchip->chip.ngpio; in mvebu_pwm_probe()
846 struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); in mvebu_gpio_dbg_show() local
850 regmap_read(mvchip->regs, GPIO_OUT_OFF + mvchip->offset, &out); in mvebu_gpio_dbg_show()
851 regmap_read(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, &io_conf); in mvebu_gpio_dbg_show()
852 regmap_read(mvchip->regs, GPIO_BLINK_EN_OFF + mvchip->offset, &blink); in mvebu_gpio_dbg_show()
853 regmap_read(mvchip->regs, GPIO_IN_POL_OFF + mvchip->offset, &in_pol); in mvebu_gpio_dbg_show()
854 regmap_read(mvchip->regs, GPIO_DATA_IN_OFF + mvchip->offset, &data_in); in mvebu_gpio_dbg_show()
855 cause = mvebu_gpio_read_edge_cause(mvchip); in mvebu_gpio_dbg_show()
856 edg_msk = mvebu_gpio_read_edge_mask(mvchip); in mvebu_gpio_dbg_show()
857 lvl_msk = mvebu_gpio_read_level_mask(mvchip); in mvebu_gpio_dbg_show()
926 struct mvebu_gpio_chip *mvchip = platform_get_drvdata(pdev); in mvebu_gpio_suspend() local
929 regmap_read(mvchip->regs, GPIO_OUT_OFF + mvchip->offset, in mvebu_gpio_suspend()
930 &mvchip->out_reg); in mvebu_gpio_suspend()
931 regmap_read(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, in mvebu_gpio_suspend()
932 &mvchip->io_conf_reg); in mvebu_gpio_suspend()
933 regmap_read(mvchip->regs, GPIO_BLINK_EN_OFF + mvchip->offset, in mvebu_gpio_suspend()
934 &mvchip->blink_en_reg); in mvebu_gpio_suspend()
935 regmap_read(mvchip->regs, GPIO_IN_POL_OFF + mvchip->offset, in mvebu_gpio_suspend()
936 &mvchip->in_pol_reg); in mvebu_gpio_suspend()
938 switch (mvchip->soc_variant) { in mvebu_gpio_suspend()
941 regmap_read(mvchip->regs, GPIO_EDGE_MASK_OFF + mvchip->offset, in mvebu_gpio_suspend()
942 &mvchip->edge_mask_regs[0]); in mvebu_gpio_suspend()
943 regmap_read(mvchip->regs, GPIO_LEVEL_MASK_OFF + mvchip->offset, in mvebu_gpio_suspend()
944 &mvchip->level_mask_regs[0]); in mvebu_gpio_suspend()
948 regmap_read(mvchip->regs, in mvebu_gpio_suspend()
950 &mvchip->edge_mask_regs[i]); in mvebu_gpio_suspend()
951 regmap_read(mvchip->regs, in mvebu_gpio_suspend()
953 &mvchip->level_mask_regs[i]); in mvebu_gpio_suspend()
958 regmap_read(mvchip->regs, in mvebu_gpio_suspend()
960 &mvchip->edge_mask_regs[i]); in mvebu_gpio_suspend()
961 regmap_read(mvchip->regs, in mvebu_gpio_suspend()
963 &mvchip->level_mask_regs[i]); in mvebu_gpio_suspend()
971 mvebu_pwm_suspend(mvchip); in mvebu_gpio_suspend()
978 struct mvebu_gpio_chip *mvchip = platform_get_drvdata(pdev); in mvebu_gpio_resume() local
981 regmap_write(mvchip->regs, GPIO_OUT_OFF + mvchip->offset, in mvebu_gpio_resume()
982 mvchip->out_reg); in mvebu_gpio_resume()
983 regmap_write(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, in mvebu_gpio_resume()
984 mvchip->io_conf_reg); in mvebu_gpio_resume()
985 regmap_write(mvchip->regs, GPIO_BLINK_EN_OFF + mvchip->offset, in mvebu_gpio_resume()
986 mvchip->blink_en_reg); in mvebu_gpio_resume()
987 regmap_write(mvchip->regs, GPIO_IN_POL_OFF + mvchip->offset, in mvebu_gpio_resume()
988 mvchip->in_pol_reg); in mvebu_gpio_resume()
990 switch (mvchip->soc_variant) { in mvebu_gpio_resume()
993 regmap_write(mvchip->regs, GPIO_EDGE_MASK_OFF + mvchip->offset, in mvebu_gpio_resume()
994 mvchip->edge_mask_regs[0]); in mvebu_gpio_resume()
995 regmap_write(mvchip->regs, GPIO_LEVEL_MASK_OFF + mvchip->offset, in mvebu_gpio_resume()
996 mvchip->level_mask_regs[0]); in mvebu_gpio_resume()
1000 regmap_write(mvchip->regs, in mvebu_gpio_resume()
1002 mvchip->edge_mask_regs[i]); in mvebu_gpio_resume()
1003 regmap_write(mvchip->regs, in mvebu_gpio_resume()
1005 mvchip->level_mask_regs[i]); in mvebu_gpio_resume()
1010 regmap_write(mvchip->regs, in mvebu_gpio_resume()
1012 mvchip->edge_mask_regs[i]); in mvebu_gpio_resume()
1013 regmap_write(mvchip->regs, in mvebu_gpio_resume()
1015 mvchip->level_mask_regs[i]); in mvebu_gpio_resume()
1023 mvebu_pwm_resume(mvchip); in mvebu_gpio_resume()
1036 struct mvebu_gpio_chip *mvchip) in mvebu_gpio_probe_raw() argument
1044 mvchip->regs = devm_regmap_init_mmio(&pdev->dev, base, in mvebu_gpio_probe_raw()
1046 if (IS_ERR(mvchip->regs)) in mvebu_gpio_probe_raw()
1047 return PTR_ERR(mvchip->regs); in mvebu_gpio_probe_raw()
1053 mvchip->offset = 0; in mvebu_gpio_probe_raw()
1059 if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_ARMADAXP) { in mvebu_gpio_probe_raw()
1064 mvchip->percpu_regs = in mvebu_gpio_probe_raw()
1067 if (IS_ERR(mvchip->percpu_regs)) in mvebu_gpio_probe_raw()
1068 return PTR_ERR(mvchip->percpu_regs); in mvebu_gpio_probe_raw()
1075 struct mvebu_gpio_chip *mvchip) in mvebu_gpio_probe_syscon() argument
1077 mvchip->regs = syscon_node_to_regmap(pdev->dev.parent->of_node); in mvebu_gpio_probe_syscon()
1078 if (IS_ERR(mvchip->regs)) in mvebu_gpio_probe_syscon()
1079 return PTR_ERR(mvchip->regs); in mvebu_gpio_probe_syscon()
1081 if (of_property_read_u32(pdev->dev.of_node, "offset", &mvchip->offset)) in mvebu_gpio_probe_syscon()
1089 struct mvebu_gpio_chip *mvchip; in mvebu_gpio_probe() local
1109 mvchip = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_gpio_chip), in mvebu_gpio_probe()
1111 if (!mvchip) in mvebu_gpio_probe()
1114 platform_set_drvdata(pdev, mvchip); in mvebu_gpio_probe()
1127 mvchip->clk = devm_clk_get(&pdev->dev, NULL); in mvebu_gpio_probe()
1129 if (!IS_ERR(mvchip->clk)) in mvebu_gpio_probe()
1130 clk_prepare_enable(mvchip->clk); in mvebu_gpio_probe()
1132 mvchip->soc_variant = soc_variant; in mvebu_gpio_probe()
1133 mvchip->chip.label = dev_name(&pdev->dev); in mvebu_gpio_probe()
1134 mvchip->chip.parent = &pdev->dev; in mvebu_gpio_probe()
1135 mvchip->chip.request = gpiochip_generic_request; in mvebu_gpio_probe()
1136 mvchip->chip.free = gpiochip_generic_free; in mvebu_gpio_probe()
1137 mvchip->chip.get_direction = mvebu_gpio_get_direction; in mvebu_gpio_probe()
1138 mvchip->chip.direction_input = mvebu_gpio_direction_input; in mvebu_gpio_probe()
1139 mvchip->chip.get = mvebu_gpio_get; in mvebu_gpio_probe()
1140 mvchip->chip.direction_output = mvebu_gpio_direction_output; in mvebu_gpio_probe()
1141 mvchip->chip.set = mvebu_gpio_set; in mvebu_gpio_probe()
1143 mvchip->chip.to_irq = mvebu_gpio_to_irq; in mvebu_gpio_probe()
1144 mvchip->chip.base = id * MVEBU_MAX_GPIO_PER_BANK; in mvebu_gpio_probe()
1145 mvchip->chip.ngpio = ngpios; in mvebu_gpio_probe()
1146 mvchip->chip.can_sleep = false; in mvebu_gpio_probe()
1147 mvchip->chip.of_node = np; in mvebu_gpio_probe()
1148 mvchip->chip.dbg_show = mvebu_gpio_dbg_show; in mvebu_gpio_probe()
1151 err = mvebu_gpio_probe_syscon(pdev, mvchip); in mvebu_gpio_probe()
1153 err = mvebu_gpio_probe_raw(pdev, mvchip); in mvebu_gpio_probe()
1164 regmap_write(mvchip->regs, in mvebu_gpio_probe()
1165 GPIO_EDGE_CAUSE_OFF + mvchip->offset, 0); in mvebu_gpio_probe()
1166 regmap_write(mvchip->regs, in mvebu_gpio_probe()
1167 GPIO_EDGE_MASK_OFF + mvchip->offset, 0); in mvebu_gpio_probe()
1168 regmap_write(mvchip->regs, in mvebu_gpio_probe()
1169 GPIO_LEVEL_MASK_OFF + mvchip->offset, 0); in mvebu_gpio_probe()
1172 regmap_write(mvchip->regs, GPIO_EDGE_CAUSE_OFF, 0); in mvebu_gpio_probe()
1174 regmap_write(mvchip->regs, in mvebu_gpio_probe()
1176 regmap_write(mvchip->regs, in mvebu_gpio_probe()
1181 regmap_write(mvchip->regs, GPIO_EDGE_CAUSE_OFF, 0); in mvebu_gpio_probe()
1182 regmap_write(mvchip->regs, GPIO_EDGE_MASK_OFF, 0); in mvebu_gpio_probe()
1183 regmap_write(mvchip->regs, GPIO_LEVEL_MASK_OFF, 0); in mvebu_gpio_probe()
1185 regmap_write(mvchip->percpu_regs, in mvebu_gpio_probe()
1187 regmap_write(mvchip->percpu_regs, in mvebu_gpio_probe()
1189 regmap_write(mvchip->percpu_regs, in mvebu_gpio_probe()
1197 devm_gpiochip_add_data(&pdev->dev, &mvchip->chip, mvchip); in mvebu_gpio_probe()
1203 mvchip->domain = in mvebu_gpio_probe()
1205 if (!mvchip->domain) { in mvebu_gpio_probe()
1207 mvchip->chip.label); in mvebu_gpio_probe()
1212 mvchip->domain, ngpios, 2, np->name, handle_level_irq, in mvebu_gpio_probe()
1216 mvchip->chip.label); in mvebu_gpio_probe()
1224 gc = irq_get_domain_generic_chip(mvchip->domain, 0); in mvebu_gpio_probe()
1225 gc->private = mvchip; in mvebu_gpio_probe()
1231 ct->chip.name = mvchip->chip.label; in mvebu_gpio_probe()
1240 ct->chip.name = mvchip->chip.label; in mvebu_gpio_probe()
1253 mvchip); in mvebu_gpio_probe()
1258 return mvebu_pwm_probe(pdev, mvchip, id); in mvebu_gpio_probe()
1263 irq_domain_remove(mvchip->domain); in mvebu_gpio_probe()