118 	config->gb_addr_config = adev->gfx.config.gb_addr_config;  in amdgpu_amdkfd_get_tile_config()
125 	config->num_banks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg,  in amdgpu_amdkfd_get_tile_config()
127 	config->num_ranks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg,  in amdgpu_amdkfd_get_tile_config()
131 	config->tile_config_ptr = adev->gfx.config.tile_mode_array;  in amdgpu_amdkfd_get_tile_config()
133 			ARRAY_SIZE(adev->gfx.config.tile_mode_array);  in amdgpu_amdkfd_get_tile_config()
135 			adev->gfx.config.macrotile_mode_array;  in amdgpu_amdkfd_get_tile_config()
137 			ARRAY_SIZE(adev->gfx.config.macrotile_mode_array);  in amdgpu_amdkfd_get_tile_config()
200 	uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1;  in acquire_queue()
201 	uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);  in acquire_queue()
209 	unsigned int bit = (pipe_id * adev->gfx.mec.num_queue_per_pipe +  in get_queue_mask()
295 	mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1;  in kgd_init_interrupts()
296 	pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);  in kgd_init_interrupts()
376 		mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1;  in kgd_hqd_load()
377 		pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec);  in kgd_hqd_load()
808 	struct amdgpu_ring *ring = &adev->gfx.kiq.ring;  in invalidate_tlbs_with_kiq()
810 	spin_lock(&adev->gfx.kiq.ring_lock);  in invalidate_tlbs_with_kiq()
818 	spin_unlock(&adev->gfx.kiq.ring_lock);  in invalidate_tlbs_with_kiq()
833 	struct amdgpu_ring *ring = &adev->gfx.kiq.ring;  in invalidate_tlbs()