1836 static struct  si_ps *si_get_ps(struct amdgpu_ps *rps);
3147 			  struct amdgpu_ps *rps)  in ni_update_current_ps()  argument
3149 	struct si_ps *new_ps = si_get_ps(rps);  in ni_update_current_ps()
3153 	eg_pi->current_rps = *rps;  in ni_update_current_ps()
3160 			    struct amdgpu_ps *rps)  in ni_update_requested_ps()  argument
3162 	struct si_ps *new_ps = si_get_ps(rps);  in ni_update_requested_ps()
3166 	eg_pi->requested_rps = *rps;  in ni_update_requested_ps()
3428 					struct amdgpu_ps *rps)  in si_apply_state_adjust_rules()  argument
3430 	struct  si_ps *ps = si_get_ps(rps);  in si_apply_state_adjust_rules()
3466 	if (rps->vce_active) {  in si_apply_state_adjust_rules()
3467 		rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk;  in si_apply_state_adjust_rules()
3468 		rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk;  in si_apply_state_adjust_rules()
3469 		si_get_vce_clock_voltage(adev, rps->evclk, rps->ecclk,  in si_apply_state_adjust_rules()
3472 		rps->evclk = 0;  in si_apply_state_adjust_rules()
3473 		rps->ecclk = 0;  in si_apply_state_adjust_rules()
3480 	if (rps->vclk || rps->dclk) {  in si_apply_state_adjust_rules()
3556 	if (rps->vce_active) {  in si_apply_state_adjust_rules()
3864 	struct amdgpu_ps *rps = adev->pm.dpm.current_ps;  in si_dpm_force_performance_level()  local
3865 	struct  si_ps *ps = si_get_ps(rps);  in si_dpm_force_performance_level()
7107 					  struct amdgpu_ps *rps,  in si_parse_pplib_non_clock_info()  argument
7111 	rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);  in si_parse_pplib_non_clock_info()
7112 	rps->class = le16_to_cpu(non_clock_info->usClassification);  in si_parse_pplib_non_clock_info()
7113 	rps->class2 = le16_to_cpu(non_clock_info->usClassification2);  in si_parse_pplib_non_clock_info()
7116 		rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);  in si_parse_pplib_non_clock_info()
7117 		rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);  in si_parse_pplib_non_clock_info()
7118 	} else if (r600_is_uvd_state(rps->class, rps->class2)) {  in si_parse_pplib_non_clock_info()
7119 		rps->vclk = RV770_DEFAULT_VCLK_FREQ;  in si_parse_pplib_non_clock_info()
7120 		rps->dclk = RV770_DEFAULT_DCLK_FREQ;  in si_parse_pplib_non_clock_info()
7122 		rps->vclk = 0;  in si_parse_pplib_non_clock_info()
7123 		rps->dclk = 0;  in si_parse_pplib_non_clock_info()
7126 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_BOOT)  in si_parse_pplib_non_clock_info()
7127 		adev->pm.dpm.boot_ps = rps;  in si_parse_pplib_non_clock_info()
7128 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE)  in si_parse_pplib_non_clock_info()
7129 		adev->pm.dpm.uvd_ps = rps;  in si_parse_pplib_non_clock_info()
7133 				      struct amdgpu_ps *rps, int index,  in si_parse_pplib_clock_info()  argument
7139 	struct  si_ps *ps = si_get_ps(rps);  in si_parse_pplib_clock_info()
7165 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_ACPI) {  in si_parse_pplib_clock_info()
7171 	if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) &&  in si_parse_pplib_clock_info()
7189 	if (rps->class & ATOM_PPLIB_CLASSIFICATION_BOOT) {  in si_parse_pplib_clock_info()
7199 	if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) ==  in si_parse_pplib_clock_info()
7487 	struct amdgpu_ps *rps = &eg_pi->current_rps;  in si_dpm_debugfs_print_current_performance_level()  local
7488 	struct  si_ps *ps = si_get_ps(rps);  in si_dpm_debugfs_print_current_performance_level()
7498 		seq_printf(m, "uvd    vclk: %d dclk: %d\n", rps->vclk, rps->dclk);  in si_dpm_debugfs_print_current_performance_level()
7898 	struct amdgpu_ps *rps = (struct amdgpu_ps *)current_ps;  in si_dpm_print_power_state()  local
7899 	struct  si_ps *ps = si_get_ps(rps);  in si_dpm_print_power_state()
7903 	amdgpu_dpm_print_class_info(rps->class, rps->class2);  in si_dpm_print_power_state()
7904 	amdgpu_dpm_print_cap_info(rps->caps);  in si_dpm_print_power_state()
7905 	DRM_INFO("\tuvd    vclk: %d dclk: %d\n", rps->vclk, rps->dclk);  in si_dpm_print_power_state()
7915 	amdgpu_dpm_print_ps_status(adev, rps);  in si_dpm_print_power_state()
7948 	struct amdgpu_ps *rps = (struct amdgpu_ps *)request_ps;  in si_check_state_equal()  local
7951 	if (adev == NULL || cps == NULL || rps == NULL || equal == NULL)  in si_check_state_equal()
7955 	si_rps = si_get_ps((struct amdgpu_ps *)rps);  in si_check_state_equal()
7977 	*equal = ((cps->vclk == rps->vclk) && (cps->dclk == rps->dclk));  in si_check_state_equal()
7978 	*equal &= ((cps->evclk == rps->evclk) && (cps->ecclk == rps->ecclk));  in si_check_state_equal()
7988 	struct amdgpu_ps *rps = &eg_pi->current_rps;  in si_dpm_read_sensor()  local
7989 	struct  si_ps *ps = si_get_ps(rps);  in si_dpm_read_sensor()