707         dpm_state->hard_min_level = 0x0;  in vega20_init_single_dpm_state()
1256 		freq = single_dpm_table->dpm_state.hard_min_level;  in vega20_upload_dpm_level()
1276 	uint32_t soft_min_level, soft_max_level, hard_min_level;  in vega20_force_clk_levels()  local
1402 		hard_min_level = soft_min_level;  in vega20_force_clk_levels()
1405 		if (hard_min_level >= single_dpm_table->count) {  in vega20_force_clk_levels()
1407 					hard_min_level, single_dpm_table->count - 1);  in vega20_force_clk_levels()
1412 		single_dpm_table->dpm_state.hard_min_level =  in vega20_force_clk_levels()
1413 			single_dpm_table->dpm_levels[hard_min_level].value;  in vega20_force_clk_levels()
2049 		dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;  in vega20_set_uclk_to_highest_dpm_level()
2052 				(PPCLK_UCLK << 16) | dpm_table->dpm_state.hard_min_level);  in vega20_set_uclk_to_highest_dpm_level()
2120 	dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;  in vega20_apply_clocks_adjust_rules()
2142 	dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;  in vega20_apply_clocks_adjust_rules()
2161 	if (dpm_table->dpm_state.hard_min_level < (smu->display_config->min_mem_set_clock / 100))  in vega20_apply_clocks_adjust_rules()
2162 		dpm_table->dpm_state.hard_min_level = smu->display_config->min_mem_set_clock / 100;  in vega20_apply_clocks_adjust_rules()
2166 		dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;  in vega20_apply_clocks_adjust_rules()
2170 					dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[i].value;  in vega20_apply_clocks_adjust_rules()
2178 		dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;  in vega20_apply_clocks_adjust_rules()
2184 	dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;  in vega20_apply_clocks_adjust_rules()
2201 	dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;  in vega20_apply_clocks_adjust_rules()
2218 	dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;  in vega20_apply_clocks_adjust_rules()
2235 	dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;  in vega20_apply_clocks_adjust_rules()
2282 		memtable->dpm_state.hard_min_level = min_clocks.memory_clock/100;  in vega20_notify_smc_dispaly_config()
2285 						  (PPCLK_UCLK << 16) | memtable->dpm_state.hard_min_level);  in vega20_notify_smc_dispaly_config()