Lines Matching refs:tc
283 static inline int tc_poll_timeout(struct tc_data *tc, unsigned int addr, in tc_poll_timeout() argument
290 return regmap_read_poll_timeout(tc->regmap, addr, val, in tc_poll_timeout()
295 static int tc_aux_wait_busy(struct tc_data *tc) in tc_aux_wait_busy() argument
297 return tc_poll_timeout(tc, DP0_AUXSTATUS, AUX_BUSY, 0, 1000, 100000); in tc_aux_wait_busy()
300 static int tc_aux_write_data(struct tc_data *tc, const void *data, in tc_aux_write_data() argument
308 ret = regmap_raw_write(tc->regmap, DP0_AUXWDATA(0), auxwdata, count); in tc_aux_write_data()
315 static int tc_aux_read_data(struct tc_data *tc, void *data, size_t size) in tc_aux_read_data() argument
320 ret = regmap_raw_read(tc->regmap, DP0_AUXRDATA(0), auxrdata, count); in tc_aux_read_data()
344 struct tc_data *tc = aux_to_tc(aux); in tc_aux_transfer() local
350 ret = tc_aux_wait_busy(tc); in tc_aux_transfer()
361 ret = tc_aux_write_data(tc, msg->buffer, size); in tc_aux_transfer()
371 ret = regmap_write(tc->regmap, DP0_AUXADDR, msg->address); in tc_aux_transfer()
375 ret = regmap_write(tc->regmap, DP0_AUXCFG0, tc_auxcfg0(msg, size)); in tc_aux_transfer()
379 ret = tc_aux_wait_busy(tc); in tc_aux_transfer()
383 ret = regmap_read(tc->regmap, DP0_AUXSTATUS, &auxstatus); in tc_aux_transfer()
403 return tc_aux_read_data(tc, msg->buffer, size); in tc_aux_transfer()
428 static u32 tc_srcctrl(struct tc_data *tc) in tc_srcctrl() argument
436 if (tc->link.scrambler_dis) in tc_srcctrl()
438 if (tc->link.spread) in tc_srcctrl()
440 if (tc->link.base.num_lanes == 2) in tc_srcctrl()
442 if (tc->link.base.rate != 162000) in tc_srcctrl()
447 static int tc_pllupdate(struct tc_data *tc, unsigned int pllctrl) in tc_pllupdate() argument
451 ret = regmap_write(tc->regmap, pllctrl, PLLUPDATE | PLLEN); in tc_pllupdate()
461 static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) in tc_pxl_pll_en() argument
474 dev_dbg(tc->dev, "PLL: requested %d pixelclock, ref %d\n", pixelclock, in tc_pxl_pll_en()
522 dev_err(tc->dev, "Failed to calc clock for %d pixelclock\n", in tc_pxl_pll_en()
527 dev_dbg(tc->dev, "PLL: got %d, delta %d\n", best_pixelclock, in tc_pxl_pll_en()
529 dev_dbg(tc->dev, "PLL: %d / %d / %d * %d / %d\n", refclk, in tc_pxl_pll_en()
542 ret = regmap_write(tc->regmap, PXL_PLLCTRL, PLLBYP | PLLEN); in tc_pxl_pll_en()
553 ret = regmap_write(tc->regmap, PXL_PLLPARAM, pxl_pllparam); in tc_pxl_pll_en()
558 return tc_pllupdate(tc, PXL_PLLCTRL); in tc_pxl_pll_en()
561 static int tc_pxl_pll_dis(struct tc_data *tc) in tc_pxl_pll_dis() argument
564 return regmap_write(tc->regmap, PXL_PLLCTRL, PLLBYP); in tc_pxl_pll_dis()
567 static int tc_stream_clock_calc(struct tc_data *tc) in tc_stream_clock_calc() argument
584 return regmap_write(tc->regmap, DP0_VIDMNGEN1, 32768); in tc_stream_clock_calc()
587 static int tc_set_syspllparam(struct tc_data *tc) in tc_set_syspllparam() argument
592 rate = clk_get_rate(tc->refclk); in tc_set_syspllparam()
607 dev_err(tc->dev, "Invalid refclk rate: %lu Hz\n", rate); in tc_set_syspllparam()
611 return regmap_write(tc->regmap, SYS_PLLPARAM, pllparam); in tc_set_syspllparam()
614 static int tc_aux_link_setup(struct tc_data *tc) in tc_aux_link_setup() argument
620 ret = tc_set_syspllparam(tc); in tc_aux_link_setup()
624 ret = regmap_write(tc->regmap, DP_PHY_CTRL, in tc_aux_link_setup()
632 ret = tc_pllupdate(tc, DP0_PLLCTRL); in tc_aux_link_setup()
636 ret = tc_pllupdate(tc, DP1_PLLCTRL); in tc_aux_link_setup()
640 ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 1, 1000); in tc_aux_link_setup()
642 dev_err(tc->dev, "Timeout waiting for PHY to become ready"); in tc_aux_link_setup()
653 ret = regmap_write(tc->regmap, DP0_AUXCFG1, dp0_auxcfg1); in tc_aux_link_setup()
659 dev_err(tc->dev, "tc_aux_link_setup failed: %d\n", ret); in tc_aux_link_setup()
663 static int tc_get_display_props(struct tc_data *tc) in tc_get_display_props() argument
669 ret = drm_dp_link_probe(&tc->aux, &tc->link.base); in tc_get_display_props()
672 if (tc->link.base.rate != 162000 && tc->link.base.rate != 270000) { in tc_get_display_props()
673 dev_dbg(tc->dev, "Falling to 2.7 Gbps rate\n"); in tc_get_display_props()
674 tc->link.base.rate = 270000; in tc_get_display_props()
677 if (tc->link.base.num_lanes > 2) { in tc_get_display_props()
678 dev_dbg(tc->dev, "Falling to 2 lanes\n"); in tc_get_display_props()
679 tc->link.base.num_lanes = 2; in tc_get_display_props()
682 ret = drm_dp_dpcd_readb(&tc->aux, DP_MAX_DOWNSPREAD, ®); in tc_get_display_props()
685 tc->link.spread = reg & DP_MAX_DOWNSPREAD_0_5; in tc_get_display_props()
687 ret = drm_dp_dpcd_readb(&tc->aux, DP_MAIN_LINK_CHANNEL_CODING, ®); in tc_get_display_props()
691 tc->link.scrambler_dis = false; in tc_get_display_props()
693 ret = drm_dp_dpcd_readb(&tc->aux, DP_EDP_CONFIGURATION_SET, ®); in tc_get_display_props()
696 tc->link.assr = reg & DP_ALTERNATE_SCRAMBLER_RESET_ENABLE; in tc_get_display_props()
698 dev_dbg(tc->dev, "DPCD rev: %d.%d, rate: %s, lanes: %d, framing: %s\n", in tc_get_display_props()
699 tc->link.base.revision >> 4, tc->link.base.revision & 0x0f, in tc_get_display_props()
700 (tc->link.base.rate == 162000) ? "1.62Gbps" : "2.7Gbps", in tc_get_display_props()
701 tc->link.base.num_lanes, in tc_get_display_props()
702 (tc->link.base.capabilities & DP_LINK_CAP_ENHANCED_FRAMING) ? in tc_get_display_props()
704 dev_dbg(tc->dev, "Downspread: %s, scrambler: %s\n", in tc_get_display_props()
705 tc->link.spread ? "0.5%" : "0.0%", in tc_get_display_props()
706 tc->link.scrambler_dis ? "disabled" : "enabled"); in tc_get_display_props()
707 dev_dbg(tc->dev, "Display ASSR: %d, TC358767 ASSR: %d\n", in tc_get_display_props()
708 tc->link.assr, tc->assr); in tc_get_display_props()
713 dev_err(tc->dev, "failed to read DPCD: %d\n", ret); in tc_get_display_props()
717 static int tc_set_video_mode(struct tc_data *tc, in tc_set_video_mode() argument
742 out_bw = tc->link.base.num_lanes * tc->link.base.rate; in tc_set_video_mode()
745 dev_dbg(tc->dev, "set mode %dx%d\n", in tc_set_video_mode()
747 dev_dbg(tc->dev, "H margin %d,%d sync %d\n", in tc_set_video_mode()
749 dev_dbg(tc->dev, "V margin %d,%d sync %d\n", in tc_set_video_mode()
751 dev_dbg(tc->dev, "total: %dx%d\n", mode->htotal, mode->vtotal); in tc_set_video_mode()
760 ret = regmap_write(tc->regmap, VPCTRL0, in tc_set_video_mode()
766 ret = regmap_write(tc->regmap, HTIM01, in tc_set_video_mode()
772 ret = regmap_write(tc->regmap, HTIM02, in tc_set_video_mode()
778 ret = regmap_write(tc->regmap, VTIM01, in tc_set_video_mode()
784 ret = regmap_write(tc->regmap, VTIM02, in tc_set_video_mode()
790 ret = regmap_write(tc->regmap, VFUEN0, VFUEN); /* update settings */ in tc_set_video_mode()
795 ret = regmap_write(tc->regmap, TSTCTL, in tc_set_video_mode()
806 ret = regmap_write(tc->regmap, DP0_VIDSYNCDELAY, in tc_set_video_mode()
810 ret = regmap_write(tc->regmap, DP0_TOTALVAL, in tc_set_video_mode()
816 ret = regmap_write(tc->regmap, DP0_STARTVAL, in tc_set_video_mode()
822 ret = regmap_write(tc->regmap, DP0_ACTIVEVAL, in tc_set_video_mode()
837 ret = regmap_write(tc->regmap, DP0_SYNCVAL, dp0_syncval); in tc_set_video_mode()
841 ret = regmap_write(tc->regmap, DPIPXLFMT, in tc_set_video_mode()
848 ret = regmap_write(tc->regmap, DP0_MISC, in tc_set_video_mode()
858 static int tc_wait_link_training(struct tc_data *tc) in tc_wait_link_training() argument
863 ret = tc_poll_timeout(tc, DP0_LTSTAT, LT_LOOPDONE, in tc_wait_link_training()
866 dev_err(tc->dev, "Link training timeout waiting for LT_LOOPDONE!\n"); in tc_wait_link_training()
870 ret = regmap_read(tc->regmap, DP0_LTSTAT, &value); in tc_wait_link_training()
877 static int tc_main_link_enable(struct tc_data *tc) in tc_main_link_enable() argument
879 struct drm_dp_aux *aux = &tc->aux; in tc_main_link_enable()
880 struct device *dev = tc->dev; in tc_main_link_enable()
886 dev_dbg(tc->dev, "link enable\n"); in tc_main_link_enable()
888 ret = regmap_read(tc->regmap, DP0CTL, &value); in tc_main_link_enable()
893 ret = regmap_write(tc->regmap, DP0CTL, 0); in tc_main_link_enable()
898 ret = regmap_write(tc->regmap, DP0_SRCCTRL, tc_srcctrl(tc)); in tc_main_link_enable()
902 ret = regmap_write(tc->regmap, DP1_SRCCTRL, in tc_main_link_enable()
903 (tc->link.spread ? DP0_SRCCTRL_SSCG : 0) | in tc_main_link_enable()
904 ((tc->link.base.rate != 162000) ? DP0_SRCCTRL_BW27 : 0)); in tc_main_link_enable()
908 ret = tc_set_syspllparam(tc); in tc_main_link_enable()
914 if (tc->link.base.num_lanes == 2) in tc_main_link_enable()
917 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); in tc_main_link_enable()
922 ret = tc_pllupdate(tc, DP0_PLLCTRL); in tc_main_link_enable()
926 ret = tc_pllupdate(tc, DP1_PLLCTRL); in tc_main_link_enable()
932 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); in tc_main_link_enable()
935 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); in tc_main_link_enable()
937 ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 1, 1000); in tc_main_link_enable()
944 ret = regmap_update_bits(tc->regmap, DP0_MISC, BPC_8, BPC_8); in tc_main_link_enable()
955 if (tc->assr != tc->link.assr) { in tc_main_link_enable()
957 tc->assr); in tc_main_link_enable()
959 tmp[0] = tc->assr; in tc_main_link_enable()
968 if (tmp[0] != tc->assr) { in tc_main_link_enable()
970 tc->assr); in tc_main_link_enable()
972 tc->link.scrambler_dis = true; in tc_main_link_enable()
977 ret = drm_dp_link_configure(aux, &tc->link.base); in tc_main_link_enable()
982 tmp[0] = tc->link.spread ? DP_SPREAD_AMP_0_5 : 0x00; in tc_main_link_enable()
999 ret = regmap_write(tc->regmap, DP0_SNKLTCTRL, in tc_main_link_enable()
1005 ret = regmap_write(tc->regmap, DP0_LTLOOPCTRL, in tc_main_link_enable()
1012 ret = regmap_write(tc->regmap, DP0_SRCCTRL, in tc_main_link_enable()
1013 tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | in tc_main_link_enable()
1020 ret = regmap_write(tc->regmap, DP0CTL, in tc_main_link_enable()
1021 ((tc->link.base.capabilities & in tc_main_link_enable()
1029 ret = tc_wait_link_training(tc); in tc_main_link_enable()
1034 dev_err(tc->dev, "Link training phase 1 failed: %s\n", in tc_main_link_enable()
1042 ret = regmap_write(tc->regmap, DP0_SNKLTCTRL, in tc_main_link_enable()
1048 ret = regmap_write(tc->regmap, DP0_SRCCTRL, in tc_main_link_enable()
1049 tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | in tc_main_link_enable()
1056 ret = tc_wait_link_training(tc); in tc_main_link_enable()
1061 dev_err(tc->dev, "Link training phase 2 failed: %s\n", in tc_main_link_enable()
1076 ret = regmap_write(tc->regmap, DP0_SRCCTRL, tc_srcctrl(tc) | in tc_main_link_enable()
1083 tmp[0] = tc->link.scrambler_dis ? DP_LINK_SCRAMBLING_DISABLE : 0x00; in tc_main_link_enable()
1098 dev_err(tc->dev, "Lane 0 failed: %x\n", value); in tc_main_link_enable()
1102 if (tc->link.base.num_lanes == 2) { in tc_main_link_enable()
1106 dev_err(tc->dev, "Lane 1 failed: %x\n", value); in tc_main_link_enable()
1111 dev_err(tc->dev, "Interlane align failed\n"); in tc_main_link_enable()
1128 dev_err(tc->dev, "Failed to read DPCD: %d\n", ret); in tc_main_link_enable()
1131 dev_err(tc->dev, "Failed to write DPCD: %d\n", ret); in tc_main_link_enable()
1135 static int tc_main_link_disable(struct tc_data *tc) in tc_main_link_disable() argument
1139 dev_dbg(tc->dev, "link disable\n"); in tc_main_link_disable()
1141 ret = regmap_write(tc->regmap, DP0_SRCCTRL, 0); in tc_main_link_disable()
1145 return regmap_write(tc->regmap, DP0CTL, 0); in tc_main_link_disable()
1148 static int tc_stream_enable(struct tc_data *tc) in tc_stream_enable() argument
1153 dev_dbg(tc->dev, "enable video stream\n"); in tc_stream_enable()
1157 ret = tc_pxl_pll_en(tc, clk_get_rate(tc->refclk), in tc_stream_enable()
1158 1000 * tc->mode.clock); in tc_stream_enable()
1163 ret = tc_set_video_mode(tc, &tc->mode); in tc_stream_enable()
1168 ret = tc_stream_clock_calc(tc); in tc_stream_enable()
1173 if (tc->link.base.capabilities & DP_LINK_CAP_ENHANCED_FRAMING) in tc_stream_enable()
1175 ret = regmap_write(tc->regmap, DP0CTL, value); in tc_stream_enable()
1187 ret = regmap_write(tc->regmap, DP0CTL, value); in tc_stream_enable()
1196 ret = regmap_write(tc->regmap, SYSCTRL, value); in tc_stream_enable()
1203 static int tc_stream_disable(struct tc_data *tc) in tc_stream_disable() argument
1207 dev_dbg(tc->dev, "disable video stream\n"); in tc_stream_disable()
1209 ret = regmap_update_bits(tc->regmap, DP0CTL, VID_EN, 0); in tc_stream_disable()
1213 tc_pxl_pll_dis(tc); in tc_stream_disable()
1220 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_pre_enable() local
1222 drm_panel_prepare(tc->panel); in tc_bridge_pre_enable()
1227 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_enable() local
1230 ret = tc_get_display_props(tc); in tc_bridge_enable()
1232 dev_err(tc->dev, "failed to read display props: %d\n", ret); in tc_bridge_enable()
1236 ret = tc_main_link_enable(tc); in tc_bridge_enable()
1238 dev_err(tc->dev, "main link enable error: %d\n", ret); in tc_bridge_enable()
1242 ret = tc_stream_enable(tc); in tc_bridge_enable()
1244 dev_err(tc->dev, "main link stream start error: %d\n", ret); in tc_bridge_enable()
1245 tc_main_link_disable(tc); in tc_bridge_enable()
1249 drm_panel_enable(tc->panel); in tc_bridge_enable()
1254 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_disable() local
1257 drm_panel_disable(tc->panel); in tc_bridge_disable()
1259 ret = tc_stream_disable(tc); in tc_bridge_disable()
1261 dev_err(tc->dev, "main link stream stop error: %d\n", ret); in tc_bridge_disable()
1263 ret = tc_main_link_disable(tc); in tc_bridge_disable()
1265 dev_err(tc->dev, "main link disable error: %d\n", ret); in tc_bridge_disable()
1270 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_post_disable() local
1272 drm_panel_unprepare(tc->panel); in tc_bridge_post_disable()
1290 struct tc_data *tc = bridge_to_tc(bridge); in tc_mode_valid() local
1299 avail = tc->link.base.num_lanes * tc->link.base.rate; in tc_mode_valid()
1311 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_mode_set() local
1313 tc->mode = *mode; in tc_bridge_mode_set()
1318 struct tc_data *tc = connector_to_tc(connector); in tc_connector_get_modes() local
1323 ret = tc_get_display_props(tc); in tc_connector_get_modes()
1325 dev_err(tc->dev, "failed to read display props: %d\n", ret); in tc_connector_get_modes()
1329 count = drm_panel_get_modes(tc->panel); in tc_connector_get_modes()
1333 edid = drm_get_edid(connector, &tc->aux.ddc); in tc_connector_get_modes()
1335 kfree(tc->edid); in tc_connector_get_modes()
1336 tc->edid = edid; in tc_connector_get_modes()
1353 struct tc_data *tc = connector_to_tc(connector); in tc_connector_detect() local
1358 if (tc->hpd_pin < 0) { in tc_connector_detect()
1359 if (tc->panel) in tc_connector_detect()
1365 ret = regmap_read(tc->regmap, GPIOI, &val); in tc_connector_detect()
1369 conn = val & BIT(tc->hpd_pin); in tc_connector_detect()
1389 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_attach() local
1394 drm_connector_helper_add(&tc->connector, &tc_connector_helper_funcs); in tc_bridge_attach()
1395 ret = drm_connector_init(drm, &tc->connector, &tc_connector_funcs, in tc_bridge_attach()
1396 tc->panel ? DRM_MODE_CONNECTOR_eDP : in tc_bridge_attach()
1402 if (tc->hpd_pin >= 0) { in tc_bridge_attach()
1403 if (tc->have_irq) in tc_bridge_attach()
1404 tc->connector.polled = DRM_CONNECTOR_POLL_HPD; in tc_bridge_attach()
1406 tc->connector.polled = DRM_CONNECTOR_POLL_CONNECT | in tc_bridge_attach()
1410 if (tc->panel) in tc_bridge_attach()
1411 drm_panel_attach(tc->panel, &tc->connector); in tc_bridge_attach()
1413 drm_display_info_set_bus_formats(&tc->connector.display_info, in tc_bridge_attach()
1415 tc->connector.display_info.bus_flags = in tc_bridge_attach()
1419 drm_connector_attach_encoder(&tc->connector, tc->bridge.encoder); in tc_bridge_attach()
1478 struct tc_data *tc = arg; in tc_irq_handler() local
1482 r = regmap_read(tc->regmap, INTSTS_G, &val); in tc_irq_handler()
1492 regmap_read(tc->regmap, SYSSTAT, &stat); in tc_irq_handler()
1494 dev_err(tc->dev, "syserr %x\n", stat); in tc_irq_handler()
1497 if (tc->hpd_pin >= 0 && tc->bridge.dev) { in tc_irq_handler()
1504 bool h = val & INT_GPIO_H(tc->hpd_pin); in tc_irq_handler()
1505 bool lc = val & INT_GPIO_LC(tc->hpd_pin); in tc_irq_handler()
1507 dev_dbg(tc->dev, "GPIO%d: %s %s\n", tc->hpd_pin, in tc_irq_handler()
1511 drm_kms_helper_hotplug_event(tc->bridge.dev); in tc_irq_handler()
1514 regmap_write(tc->regmap, INTSTS_G, val); in tc_irq_handler()
1522 struct tc_data *tc; in tc_probe() local
1525 tc = devm_kzalloc(dev, sizeof(*tc), GFP_KERNEL); in tc_probe()
1526 if (!tc) in tc_probe()
1529 tc->dev = dev; in tc_probe()
1532 ret = drm_of_find_panel_or_bridge(dev->of_node, 2, 0, &tc->panel, NULL); in tc_probe()
1537 tc->sd_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH); in tc_probe()
1538 if (IS_ERR(tc->sd_gpio)) in tc_probe()
1539 return PTR_ERR(tc->sd_gpio); in tc_probe()
1541 if (tc->sd_gpio) { in tc_probe()
1542 gpiod_set_value_cansleep(tc->sd_gpio, 0); in tc_probe()
1547 tc->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); in tc_probe()
1548 if (IS_ERR(tc->reset_gpio)) in tc_probe()
1549 return PTR_ERR(tc->reset_gpio); in tc_probe()
1551 if (tc->reset_gpio) { in tc_probe()
1552 gpiod_set_value_cansleep(tc->reset_gpio, 1); in tc_probe()
1556 tc->refclk = devm_clk_get(dev, "ref"); in tc_probe()
1557 if (IS_ERR(tc->refclk)) { in tc_probe()
1558 ret = PTR_ERR(tc->refclk); in tc_probe()
1563 tc->regmap = devm_regmap_init_i2c(client, &tc_regmap_config); in tc_probe()
1564 if (IS_ERR(tc->regmap)) { in tc_probe()
1565 ret = PTR_ERR(tc->regmap); in tc_probe()
1571 &tc->hpd_pin); in tc_probe()
1573 tc->hpd_pin = -ENODEV; in tc_probe()
1575 if (tc->hpd_pin < 0 || tc->hpd_pin > 1) { in tc_probe()
1583 regmap_write(tc->regmap, INTCTL_G, INT_SYSERR); in tc_probe()
1588 "tc358767-irq", tc); in tc_probe()
1594 tc->have_irq = true; in tc_probe()
1597 ret = regmap_read(tc->regmap, TC_IDREG, &tc->rev); in tc_probe()
1599 dev_err(tc->dev, "can not read device ID: %d\n", ret); in tc_probe()
1603 if ((tc->rev != 0x6601) && (tc->rev != 0x6603)) { in tc_probe()
1604 dev_err(tc->dev, "invalid device ID: 0x%08x\n", tc->rev); in tc_probe()
1608 tc->assr = (tc->rev == 0x6601); /* Enable ASSR for eDP panels */ in tc_probe()
1610 if (!tc->reset_gpio) { in tc_probe()
1617 regmap_update_bits(tc->regmap, SYSRSTENB, in tc_probe()
1620 regmap_update_bits(tc->regmap, SYSRSTENB, in tc_probe()
1626 if (tc->hpd_pin >= 0) { in tc_probe()
1627 u32 lcnt_reg = tc->hpd_pin == 0 ? INT_GP0_LCNT : INT_GP1_LCNT; in tc_probe()
1628 u32 h_lc = INT_GPIO_H(tc->hpd_pin) | INT_GPIO_LC(tc->hpd_pin); in tc_probe()
1631 regmap_write(tc->regmap, lcnt_reg, in tc_probe()
1632 clk_get_rate(tc->refclk) * 2 / 1000); in tc_probe()
1634 regmap_write(tc->regmap, GPIOM, BIT(tc->hpd_pin)); in tc_probe()
1636 if (tc->have_irq) { in tc_probe()
1638 regmap_update_bits(tc->regmap, INTCTL_G, h_lc, h_lc); in tc_probe()
1642 ret = tc_aux_link_setup(tc); in tc_probe()
1647 tc->aux.name = "TC358767 AUX i2c adapter"; in tc_probe()
1648 tc->aux.dev = tc->dev; in tc_probe()
1649 tc->aux.transfer = tc_aux_transfer; in tc_probe()
1650 ret = drm_dp_aux_register(&tc->aux); in tc_probe()
1654 tc->bridge.funcs = &tc_bridge_funcs; in tc_probe()
1655 tc->bridge.of_node = dev->of_node; in tc_probe()
1656 drm_bridge_add(&tc->bridge); in tc_probe()
1658 i2c_set_clientdata(client, tc); in tc_probe()
1665 struct tc_data *tc = i2c_get_clientdata(client); in tc_remove() local
1667 drm_bridge_remove(&tc->bridge); in tc_remove()
1668 drm_dp_aux_unregister(&tc->aux); in tc_remove()