44 	 .p2 = {.dot_limit = 200000, .p2_slow = 14, .p2_fast = 14},
59 	 .p2 = {.dot_limit = 200000, .p2_slow = 14, .p2_fast = 14},
71 	 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 5},
83 	 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 5},
95 	 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 10},
107 	 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 10},
312 	switch (clock->p2) {  in cdv_dpll_set_clock_cdv()
326 		DRM_ERROR("Bad P2 clock: %d\n", clock->p2);  in cdv_dpll_set_clock_cdv()
395 	clock->p = clock->p1 * clock->p2;  in cdv_intel_clock()
412 			clock.p2 = 10;  in cdv_intel_find_dp_pll()
418 			clock.p2 = 10;  in cdv_intel_find_dp_pll()
428 			clock.p2 = 10;  in cdv_intel_find_dp_pll()
434 			clock.p2 = 10;  in cdv_intel_find_dp_pll()
748 		if (clock.p2 == 7)  in cdv_intel_crtc_mode_set()
833 	clock->p = clock->p1 * clock->p2;  in i8xx_clock()
884 		clock.p2 = 14;  in cdv_intel_crtc_clock_get()
902 			clock.p2 = 4;  in cdv_intel_crtc_clock_get()
904 			clock.p2 = 2;  in cdv_intel_crtc_clock_get()