Lines Matching refs:DDI_BUF_CTL
987 i915_reg_t reg = DDI_BUF_CTL(port); in intel_wait_ddi_buf_idle()
1120 I915_WRITE(DDI_BUF_CTL(PORT_E), in hsw_fdi_link_train()
1124 POSTING_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
1167 temp = I915_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
1169 I915_WRITE(DDI_BUF_CTL(PORT_E), temp); in hsw_fdi_link_train()
1170 POSTING_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
1988 tmp = I915_READ(DDI_BUF_CTL(port)); in intel_ddi_get_encoder_pipes()
3326 val = I915_READ(DDI_BUF_CTL(port)); in intel_disable_ddi_buf()
3329 I915_WRITE(DDI_BUF_CTL(port), val); in intel_disable_ddi_buf()
3559 I915_WRITE(DDI_BUF_CTL(port), in intel_enable_ddi_hdmi()
3765 val = I915_READ(DDI_BUF_CTL(port)); in intel_ddi_prepare_link_retrain()
3768 I915_WRITE(DDI_BUF_CTL(port), val); in intel_ddi_prepare_link_retrain()
3795 I915_WRITE(DDI_BUF_CTL(port), intel_dp->DP); in intel_ddi_prepare_link_retrain()
3796 POSTING_READ(DDI_BUF_CTL(port)); in intel_ddi_prepare_link_retrain()
4029 intel_dig_port->dp.output_reg = DDI_BUF_CTL(port); in intel_ddi_init_dp_connector()
4205 intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port); in intel_ddi_init_hdmi_connector()
4250 if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) in intel_ddi_max_lanes()
4335 intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) & in intel_ddi_init()
4338 intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) & in intel_ddi_init()