466 		dev_priv->wm.vlv.cxsr = enable;  in intel_set_memory_cxsr()
468 		dev_priv->wm.g4x.cxsr = enable;  in intel_set_memory_cxsr()
1318 		wm_state->cxsr = false;  in g4x_invalidate_wms()
1380 	wm_state->cxsr = num_active_planes == BIT(PLANE_PRIMARY);  in g4x_compute_pipe_wm()
1392 	wm_state->hpll_en = wm_state->cxsr;  in g4x_compute_pipe_wm()
1436 		intermediate->cxsr = false;  in g4x_compute_intermediate_wm()
1441 	intermediate->cxsr = optimal->cxsr && active->cxsr &&  in g4x_compute_intermediate_wm()
1474 		intermediate->cxsr);  in g4x_compute_intermediate_wm()
1482 		intermediate->fbc_en && intermediate->cxsr);  in g4x_compute_intermediate_wm()
1503 	wm->cxsr = true;  in g4x_merge_wm()
1513 		if (!wm_state->cxsr)  in g4x_merge_wm()
1514 			wm->cxsr = false;  in g4x_merge_wm()
1524 		wm->cxsr = false;  in g4x_merge_wm()
1534 		if (crtc->active && wm->cxsr)  in g4x_merge_wm()
1551 	if (is_disabling(old_wm->cxsr, new_wm.cxsr, true))  in g4x_program_watermarks()
1556 	if (is_enabling(old_wm->cxsr, new_wm.cxsr, true))  in g4x_program_watermarks()
1916 	wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1;  in vlv_compute_pipe_wm()
2069 		intermediate->cxsr = false;  in vlv_compute_intermediate_wm()
2074 	intermediate->cxsr = optimal->cxsr && active->cxsr &&  in vlv_compute_intermediate_wm()
2112 	wm->cxsr = true;  in vlv_merge_wm()
2120 		if (!wm_state->cxsr)  in vlv_merge_wm()
2121 			wm->cxsr = false;  in vlv_merge_wm()
2128 		wm->cxsr = false;  in vlv_merge_wm()
2138 		if (crtc->active && wm->cxsr)  in vlv_merge_wm()
2164 	if (is_disabling(old_wm->cxsr, new_wm.cxsr, true))  in vlv_program_watermarks()
2169 	if (is_enabling(old_wm->cxsr, new_wm.cxsr, true))  in vlv_program_watermarks()
5993 	wm->cxsr = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;  in g4x_wm_get_hw_state()
6004 		active->cxsr = wm->cxsr;  in g4x_wm_get_hw_state()
6016 		if (wm->cxsr && wm->hpll_en)  in g4x_wm_get_hw_state()
6018 		else if (wm->cxsr)  in g4x_wm_get_hw_state()
6067 		      yesno(wm->cxsr), yesno(wm->hpll_en), yesno(wm->fbc_en));  in g4x_wm_get_hw_state()
6134 	wm->cxsr = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;  in vlv_wm_get_hw_state()
6184 		active->cxsr = wm->cxsr;  in vlv_wm_get_hw_state()
6220 		      wm->sr.plane, wm->sr.cursor, wm->level, wm->cxsr);  in vlv_wm_get_hw_state()