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Lines Matching refs:io_base

90 	       priv->io_base + _REG(VPP_PREBLEND_VD1_V_START_END));  in meson_g12a_crtc_atomic_enable()
95 priv->io_base + _REG(VPP_POSTBLEND_H_SIZE)); in meson_g12a_crtc_atomic_enable()
99 priv->io_base + _REG(VPP_OSD1_BLD_H_SCOPE)); in meson_g12a_crtc_atomic_enable()
102 priv->io_base + _REG(VPP_OSD1_BLD_V_SCOPE)); in meson_g12a_crtc_atomic_enable()
105 priv->io_base + _REG(VPP_OUT_H_V_SIZE)); in meson_g12a_crtc_atomic_enable()
126 priv->io_base + _REG(VPP_POSTBLEND_H_SIZE)); in meson_crtc_atomic_enable()
130 priv->io_base + _REG(VPP_PREBLEND_VD1_V_START_END)); in meson_crtc_atomic_enable()
133 priv->io_base + _REG(VPP_MISC)); in meson_crtc_atomic_enable()
182 priv->io_base + _REG(VPP_MISC)); in meson_crtc_atomic_disable()
236 priv->io_base + _REG(VPP_MISC)); in meson_crtc_enable_osd1()
242 priv->io_base + in meson_g12a_crtc_enable_osd1()
245 priv->io_base + in meson_g12a_crtc_enable_osd1()
248 priv->io_base + in meson_g12a_crtc_enable_osd1()
251 priv->io_base + in meson_g12a_crtc_enable_osd1()
254 priv->io_base + _REG(OSD1_BLEND_SRC_CTRL)); in meson_g12a_crtc_enable_osd1()
263 priv->io_base + _REG(VPP_MISC)); in meson_crtc_enable_vd1()
272 priv->io_base + _REG(VD1_BLEND_SRC_CTRL)); in meson_g12a_crtc_enable_vd1()
283 priv->io_base + _REG(VIU_OSD1_CTRL_STAT)); in meson_crtc_irq()
285 priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W0)); in meson_crtc_irq()
287 priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W1)); in meson_crtc_irq()
289 priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W2)); in meson_crtc_irq()
291 priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W3)); in meson_crtc_irq()
293 priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W4)); in meson_crtc_irq()
295 priv->io_base + _REG(VPP_OSD_SC_CTRL0)); in meson_crtc_irq()
297 priv->io_base + _REG(VPP_OSD_SCI_WH_M1)); in meson_crtc_irq()
299 priv->io_base + _REG(VPP_OSD_SCO_H_START_END)); in meson_crtc_irq()
301 priv->io_base + _REG(VPP_OSD_SCO_V_START_END)); in meson_crtc_irq()
303 priv->io_base + _REG(VPP_OSD_VSC_INI_PHASE)); in meson_crtc_irq()
305 priv->io_base + _REG(VPP_OSD_VSC_PHASE_STEP)); in meson_crtc_irq()
307 priv->io_base + _REG(VPP_OSD_HSC_INI_PHASE)); in meson_crtc_irq()
309 priv->io_base + _REG(VPP_OSD_HSC_PHASE_STEP)); in meson_crtc_irq()
311 priv->io_base + _REG(VPP_OSD_HSC_CTRL0)); in meson_crtc_irq()
313 priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); in meson_crtc_irq()
363 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
366 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
369 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
372 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
375 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
378 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
381 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
384 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
387 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
390 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
393 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
396 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
399 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
402 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
405 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
408 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
411 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
414 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
417 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
420 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
423 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
426 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
429 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
432 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
435 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
438 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
441 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
444 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
447 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
450 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
453 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
456 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
459 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
462 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
465 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
468 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
471 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
473 writel_relaxed(0, priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
475 writel_relaxed(0, priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
477 writel_relaxed(0, priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
479 writel_relaxed(0, priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
482 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
485 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
488 priv->io_base + meson_crtc->viu_offset + in meson_crtc_irq()
496 priv->io_base + _REG(VPP_SC_MISC)); in meson_crtc_irq()
498 priv->io_base + _REG(VPP_PIC_IN_HEIGHT)); in meson_crtc_irq()
500 priv->io_base + _REG(VPP_POSTBLEND_VD1_H_START_END)); in meson_crtc_irq()
502 priv->io_base + _REG(VPP_BLEND_VD2_H_START_END)); in meson_crtc_irq()
504 priv->io_base + _REG(VPP_POSTBLEND_VD1_V_START_END)); in meson_crtc_irq()
506 priv->io_base + _REG(VPP_BLEND_VD2_V_START_END)); in meson_crtc_irq()
508 priv->io_base + _REG(VPP_HSC_REGION12_STARTP)); in meson_crtc_irq()
510 priv->io_base + _REG(VPP_HSC_REGION34_STARTP)); in meson_crtc_irq()
512 priv->io_base + _REG(VPP_HSC_REGION4_ENDP)); in meson_crtc_irq()
514 priv->io_base + _REG(VPP_HSC_START_PHASE_STEP)); in meson_crtc_irq()
516 priv->io_base + _REG(VPP_HSC_REGION1_PHASE_SLOPE)); in meson_crtc_irq()
518 priv->io_base + _REG(VPP_HSC_REGION3_PHASE_SLOPE)); in meson_crtc_irq()
520 priv->io_base + _REG(VPP_LINE_IN_LENGTH)); in meson_crtc_irq()
522 priv->io_base + _REG(VPP_PREBLEND_H_SIZE)); in meson_crtc_irq()
524 priv->io_base + _REG(VPP_VSC_REGION12_STARTP)); in meson_crtc_irq()
526 priv->io_base + _REG(VPP_VSC_REGION34_STARTP)); in meson_crtc_irq()
528 priv->io_base + _REG(VPP_VSC_REGION4_ENDP)); in meson_crtc_irq()
530 priv->io_base + _REG(VPP_VSC_START_PHASE_STEP)); in meson_crtc_irq()
532 priv->io_base + _REG(VPP_VSC_INI_PHASE)); in meson_crtc_irq()
534 priv->io_base + _REG(VPP_VSC_PHASE_CTRL)); in meson_crtc_irq()
536 priv->io_base + _REG(VPP_HSC_PHASE_CTRL)); in meson_crtc_irq()
537 writel_relaxed(0x42, priv->io_base + _REG(VPP_SCALE_COEF_IDX)); in meson_crtc_irq()