Lines Matching refs:viu
148 priv->viu.osd1_enabled = false; in meson_g12a_crtc_atomic_disable()
149 priv->viu.osd1_commit = false; in meson_g12a_crtc_atomic_disable()
151 priv->viu.vd1_enabled = false; in meson_g12a_crtc_atomic_disable()
152 priv->viu.vd1_commit = false; in meson_g12a_crtc_atomic_disable()
173 priv->viu.osd1_enabled = false; in meson_crtc_atomic_disable()
174 priv->viu.osd1_commit = false; in meson_crtc_atomic_disable()
176 priv->viu.vd1_enabled = false; in meson_crtc_atomic_disable()
177 priv->viu.vd1_commit = false; in meson_crtc_atomic_disable()
215 priv->viu.osd1_commit = true; in meson_crtc_atomic_flush()
216 priv->viu.vd1_commit = true; in meson_crtc_atomic_flush()
241 writel_relaxed(priv->viu.osd_blend_din0_scope_h, in meson_g12a_crtc_enable_osd1()
244 writel_relaxed(priv->viu.osd_blend_din0_scope_v, in meson_g12a_crtc_enable_osd1()
247 writel_relaxed(priv->viu.osb_blend0_size, in meson_g12a_crtc_enable_osd1()
250 writel_relaxed(priv->viu.osb_blend1_size, in meson_g12a_crtc_enable_osd1()
281 if (priv->viu.osd1_enabled && priv->viu.osd1_commit) { in meson_crtc_irq()
282 writel_relaxed(priv->viu.osd1_ctrl_stat, in meson_crtc_irq()
284 writel_relaxed(priv->viu.osd1_blk0_cfg[0], in meson_crtc_irq()
286 writel_relaxed(priv->viu.osd1_blk0_cfg[1], in meson_crtc_irq()
288 writel_relaxed(priv->viu.osd1_blk0_cfg[2], in meson_crtc_irq()
290 writel_relaxed(priv->viu.osd1_blk0_cfg[3], in meson_crtc_irq()
292 writel_relaxed(priv->viu.osd1_blk0_cfg[4], in meson_crtc_irq()
294 writel_relaxed(priv->viu.osd_sc_ctrl0, in meson_crtc_irq()
296 writel_relaxed(priv->viu.osd_sc_i_wh_m1, in meson_crtc_irq()
298 writel_relaxed(priv->viu.osd_sc_o_h_start_end, in meson_crtc_irq()
300 writel_relaxed(priv->viu.osd_sc_o_v_start_end, in meson_crtc_irq()
302 writel_relaxed(priv->viu.osd_sc_v_ini_phase, in meson_crtc_irq()
304 writel_relaxed(priv->viu.osd_sc_v_phase_step, in meson_crtc_irq()
306 writel_relaxed(priv->viu.osd_sc_h_ini_phase, in meson_crtc_irq()
308 writel_relaxed(priv->viu.osd_sc_h_phase_step, in meson_crtc_irq()
310 writel_relaxed(priv->viu.osd_sc_h_ctrl0, in meson_crtc_irq()
312 writel_relaxed(priv->viu.osd_sc_v_ctrl0, in meson_crtc_irq()
316 priv->viu.osd1_addr, priv->viu.osd1_stride, in meson_crtc_irq()
317 priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE, in meson_crtc_irq()
324 priv->viu.osd1_commit = false; in meson_crtc_irq()
328 if (priv->viu.vd1_enabled && priv->viu.vd1_commit) { in meson_crtc_irq()
330 switch (priv->viu.vd1_planes) { in meson_crtc_irq()
334 priv->viu.vd1_addr2, in meson_crtc_irq()
335 priv->viu.vd1_stride2, in meson_crtc_irq()
336 priv->viu.vd1_height2, in meson_crtc_irq()
344 priv->viu.vd1_addr1, in meson_crtc_irq()
345 priv->viu.vd1_stride1, in meson_crtc_irq()
346 priv->viu.vd1_height1, in meson_crtc_irq()
354 priv->viu.vd1_addr0, in meson_crtc_irq()
355 priv->viu.vd1_stride0, in meson_crtc_irq()
356 priv->viu.vd1_height0, in meson_crtc_irq()
362 writel_relaxed(priv->viu.vd1_if0_gen_reg, in meson_crtc_irq()
365 writel_relaxed(priv->viu.vd1_if0_gen_reg, in meson_crtc_irq()
368 writel_relaxed(priv->viu.vd1_if0_gen_reg2, in meson_crtc_irq()
371 writel_relaxed(priv->viu.viu_vd1_fmt_ctrl, in meson_crtc_irq()
374 writel_relaxed(priv->viu.viu_vd1_fmt_ctrl, in meson_crtc_irq()
377 writel_relaxed(priv->viu.viu_vd1_fmt_w, in meson_crtc_irq()
380 writel_relaxed(priv->viu.viu_vd1_fmt_w, in meson_crtc_irq()
383 writel_relaxed(priv->viu.vd1_if0_canvas0, in meson_crtc_irq()
386 writel_relaxed(priv->viu.vd1_if0_canvas0, in meson_crtc_irq()
389 writel_relaxed(priv->viu.vd1_if0_canvas0, in meson_crtc_irq()
392 writel_relaxed(priv->viu.vd1_if0_canvas0, in meson_crtc_irq()
395 writel_relaxed(priv->viu.vd1_if0_luma_x0, in meson_crtc_irq()
398 writel_relaxed(priv->viu.vd1_if0_luma_x0, in meson_crtc_irq()
401 writel_relaxed(priv->viu.vd1_if0_luma_x0, in meson_crtc_irq()
404 writel_relaxed(priv->viu.vd1_if0_luma_x0, in meson_crtc_irq()
407 writel_relaxed(priv->viu.vd1_if0_luma_y0, in meson_crtc_irq()
410 writel_relaxed(priv->viu.vd1_if0_luma_y0, in meson_crtc_irq()
413 writel_relaxed(priv->viu.vd1_if0_luma_y0, in meson_crtc_irq()
416 writel_relaxed(priv->viu.vd1_if0_luma_y0, in meson_crtc_irq()
419 writel_relaxed(priv->viu.vd1_if0_chroma_x0, in meson_crtc_irq()
422 writel_relaxed(priv->viu.vd1_if0_chroma_x0, in meson_crtc_irq()
425 writel_relaxed(priv->viu.vd1_if0_chroma_x0, in meson_crtc_irq()
428 writel_relaxed(priv->viu.vd1_if0_chroma_x0, in meson_crtc_irq()
431 writel_relaxed(priv->viu.vd1_if0_chroma_y0, in meson_crtc_irq()
434 writel_relaxed(priv->viu.vd1_if0_chroma_y0, in meson_crtc_irq()
437 writel_relaxed(priv->viu.vd1_if0_chroma_y0, in meson_crtc_irq()
440 writel_relaxed(priv->viu.vd1_if0_chroma_y0, in meson_crtc_irq()
443 writel_relaxed(priv->viu.vd1_if0_repeat_loop, in meson_crtc_irq()
446 writel_relaxed(priv->viu.vd1_if0_repeat_loop, in meson_crtc_irq()
449 writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, in meson_crtc_irq()
452 writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, in meson_crtc_irq()
455 writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, in meson_crtc_irq()
458 writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, in meson_crtc_irq()
461 writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, in meson_crtc_irq()
464 writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, in meson_crtc_irq()
467 writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, in meson_crtc_irq()
470 writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, in meson_crtc_irq()
481 writel_relaxed(priv->viu.vd1_range_map_y, in meson_crtc_irq()
484 writel_relaxed(priv->viu.vd1_range_map_cb, in meson_crtc_irq()
487 writel_relaxed(priv->viu.vd1_range_map_cr, in meson_crtc_irq()
497 writel_relaxed(priv->viu.vpp_pic_in_height, in meson_crtc_irq()
499 writel_relaxed(priv->viu.vpp_postblend_vd1_h_start_end, in meson_crtc_irq()
501 writel_relaxed(priv->viu.vpp_blend_vd2_h_start_end, in meson_crtc_irq()
503 writel_relaxed(priv->viu.vpp_postblend_vd1_v_start_end, in meson_crtc_irq()
505 writel_relaxed(priv->viu.vpp_blend_vd2_v_start_end, in meson_crtc_irq()
507 writel_relaxed(priv->viu.vpp_hsc_region12_startp, in meson_crtc_irq()
509 writel_relaxed(priv->viu.vpp_hsc_region34_startp, in meson_crtc_irq()
511 writel_relaxed(priv->viu.vpp_hsc_region4_endp, in meson_crtc_irq()
513 writel_relaxed(priv->viu.vpp_hsc_start_phase_step, in meson_crtc_irq()
515 writel_relaxed(priv->viu.vpp_hsc_region1_phase_slope, in meson_crtc_irq()
517 writel_relaxed(priv->viu.vpp_hsc_region3_phase_slope, in meson_crtc_irq()
519 writel_relaxed(priv->viu.vpp_line_in_length, in meson_crtc_irq()
521 writel_relaxed(priv->viu.vpp_preblend_h_size, in meson_crtc_irq()
523 writel_relaxed(priv->viu.vpp_vsc_region12_startp, in meson_crtc_irq()
525 writel_relaxed(priv->viu.vpp_vsc_region34_startp, in meson_crtc_irq()
527 writel_relaxed(priv->viu.vpp_vsc_region4_endp, in meson_crtc_irq()
529 writel_relaxed(priv->viu.vpp_vsc_start_phase_step, in meson_crtc_irq()
531 writel_relaxed(priv->viu.vpp_vsc_ini_phase, in meson_crtc_irq()
533 writel_relaxed(priv->viu.vpp_vsc_phase_ctrl, in meson_crtc_irq()
535 writel_relaxed(priv->viu.vpp_hsc_phase_ctrl, in meson_crtc_irq()
543 priv->viu.vd1_commit = false; in meson_crtc_irq()