Lines Matching refs:DEFINE_EVENT

190 DEFINE_EVENT(dpu_enc_irq_template, dpu_enc_irq_register_success,
195 DEFINE_EVENT(dpu_enc_irq_template, dpu_enc_irq_unregister_success,
237 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_atomic_check,
241 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_mode_set,
245 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_disable,
249 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_kickoff,
253 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff,
257 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff_reset,
261 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_flip,
265 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_vblank_cb,
269 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit,
273 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_enc_enable,
277 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit,
281 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_wait_for_commit_done,
285 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_runtime_resume,
320 DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_underrun_cb,
324 DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_trigger_start,
360 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_rc_helper,
364 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_vblank_cb,
368 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_frame_event_cb,
372 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_phys_cmd_connect_te,
479 DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_vsync_event_work,
483 DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_early_kickoff,
501 DEFINE_EVENT(dpu_id_event_template, dpu_enc_frame_done_timeout,
505 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_cb,
509 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_done,
513 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_more_pending,
745 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_enable,
749 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_disable,
753 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_vblank,
830 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_intf,
834 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_ctls,
898 DEFINE_EVENT(dpu_core_irq_idx_cnt_template, dpu_core_irq_enable_idx,
902 DEFINE_EVENT(dpu_core_irq_idx_cnt_template, dpu_core_irq_disable_idx,
921 DEFINE_EVENT(dpu_core_irq_callback_template, dpu_core_irq_register_callback,
925 DEFINE_EVENT(dpu_core_irq_callback_template, dpu_core_irq_unregister_callback,
976 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_clear_pending_flush,
980 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template,
985 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_prepare,
989 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_start,