37 #define DISPC_OVL_BA0(n)		(DISPC_OVL_BASE(n) + \  argument
38 					DISPC_BA0_OFFSET(n))
39 #define DISPC_OVL_BA1(n)		(DISPC_OVL_BASE(n) + \  argument
40 					DISPC_BA1_OFFSET(n))
41 #define DISPC_OVL_BA0_UV(n)		(DISPC_OVL_BASE(n) + \  argument
42 					DISPC_BA0_UV_OFFSET(n))
43 #define DISPC_OVL_BA1_UV(n)		(DISPC_OVL_BASE(n) + \  argument
44 					DISPC_BA1_UV_OFFSET(n))
45 #define DISPC_OVL_POSITION(n)		(DISPC_OVL_BASE(n) + \  argument
46 					DISPC_POS_OFFSET(n))
47 #define DISPC_OVL_SIZE(n)		(DISPC_OVL_BASE(n) + \  argument
48 					DISPC_SIZE_OFFSET(n))
49 #define DISPC_OVL_ATTRIBUTES(n)		(DISPC_OVL_BASE(n) + \  argument
50 					DISPC_ATTR_OFFSET(n))
51 #define DISPC_OVL_ATTRIBUTES2(n)	(DISPC_OVL_BASE(n) + \  argument
52 					DISPC_ATTR2_OFFSET(n))
53 #define DISPC_OVL_FIFO_THRESHOLD(n)	(DISPC_OVL_BASE(n) + \  argument
54 					DISPC_FIFO_THRESH_OFFSET(n))
55 #define DISPC_OVL_FIFO_SIZE_STATUS(n)	(DISPC_OVL_BASE(n) + \  argument
56 					DISPC_FIFO_SIZE_STATUS_OFFSET(n))
57 #define DISPC_OVL_ROW_INC(n)		(DISPC_OVL_BASE(n) + \  argument
58 					DISPC_ROW_INC_OFFSET(n))
59 #define DISPC_OVL_PIXEL_INC(n)		(DISPC_OVL_BASE(n) + \  argument
60 					DISPC_PIX_INC_OFFSET(n))
61 #define DISPC_OVL_WINDOW_SKIP(n)	(DISPC_OVL_BASE(n) + \  argument
62 					DISPC_WINDOW_SKIP_OFFSET(n))
63 #define DISPC_OVL_TABLE_BA(n)		(DISPC_OVL_BASE(n) + \  argument
64 					DISPC_TABLE_BA_OFFSET(n))
65 #define DISPC_OVL_FIR(n)		(DISPC_OVL_BASE(n) + \  argument
66 					DISPC_FIR_OFFSET(n))
67 #define DISPC_OVL_FIR2(n)		(DISPC_OVL_BASE(n) + \  argument
68 					DISPC_FIR2_OFFSET(n))
69 #define DISPC_OVL_PICTURE_SIZE(n)	(DISPC_OVL_BASE(n) + \  argument
70 					DISPC_PIC_SIZE_OFFSET(n))
71 #define DISPC_OVL_ACCU0(n)		(DISPC_OVL_BASE(n) + \  argument
72 					DISPC_ACCU0_OFFSET(n))
73 #define DISPC_OVL_ACCU1(n)		(DISPC_OVL_BASE(n) + \  argument
74 					DISPC_ACCU1_OFFSET(n))
75 #define DISPC_OVL_ACCU2_0(n)		(DISPC_OVL_BASE(n) + \  argument
76 					DISPC_ACCU2_0_OFFSET(n))
77 #define DISPC_OVL_ACCU2_1(n)		(DISPC_OVL_BASE(n) + \  argument
78 					DISPC_ACCU2_1_OFFSET(n))
79 #define DISPC_OVL_FIR_COEF_H(n, i)	(DISPC_OVL_BASE(n) + \  argument
80 					DISPC_FIR_COEF_H_OFFSET(n, i))
81 #define DISPC_OVL_FIR_COEF_HV(n, i)	(DISPC_OVL_BASE(n) + \  argument
82 					DISPC_FIR_COEF_HV_OFFSET(n, i))
83 #define DISPC_OVL_FIR_COEF_H2(n, i)	(DISPC_OVL_BASE(n) + \  argument
84 					DISPC_FIR_COEF_H2_OFFSET(n, i))
85 #define DISPC_OVL_FIR_COEF_HV2(n, i)	(DISPC_OVL_BASE(n) + \  argument
86 					DISPC_FIR_COEF_HV2_OFFSET(n, i))
87 #define DISPC_OVL_CONV_COEF(n, i)	(DISPC_OVL_BASE(n) + \  argument
88 					DISPC_CONV_COEF_OFFSET(n, i))
89 #define DISPC_OVL_FIR_COEF_V(n, i)	(DISPC_OVL_BASE(n) + \  argument
90 					DISPC_FIR_COEF_V_OFFSET(n, i))
91 #define DISPC_OVL_FIR_COEF_V2(n, i)	(DISPC_OVL_BASE(n) + \  argument
92 					DISPC_FIR_COEF_V2_OFFSET(n, i))
93 #define DISPC_OVL_PRELOAD(n)		(DISPC_OVL_BASE(n) + \  argument
94 					DISPC_PRELOAD_OFFSET(n))
95 #define DISPC_OVL_MFLAG_THRESHOLD(n)	DISPC_MFLAG_THRESHOLD_OFFSET(n)  argument