Lines Matching refs:rdev
38 static int kv_enable_nb_dpm(struct radeon_device *rdev,
40 static void kv_init_graphics_levels(struct radeon_device *rdev);
41 static int kv_calculate_ds_divider(struct radeon_device *rdev);
42 static int kv_calculate_nbps_level_settings(struct radeon_device *rdev);
43 static int kv_calculate_dpm_settings(struct radeon_device *rdev);
44 static void kv_enable_new_levels(struct radeon_device *rdev);
45 static void kv_program_nbps_index_settings(struct radeon_device *rdev,
47 static int kv_set_enabled_level(struct radeon_device *rdev, u32 level);
48 static int kv_set_enabled_levels(struct radeon_device *rdev);
49 static int kv_force_dpm_highest(struct radeon_device *rdev);
50 static int kv_force_dpm_lowest(struct radeon_device *rdev);
51 static void kv_apply_state_adjust_rules(struct radeon_device *rdev,
54 static int kv_set_thermal_temperature_range(struct radeon_device *rdev,
56 static int kv_init_fps_limits(struct radeon_device *rdev);
58 void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate);
59 static void kv_dpm_powergate_vce(struct radeon_device *rdev, bool gate);
60 static void kv_dpm_powergate_samu(struct radeon_device *rdev, bool gate);
61 static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate);
63 extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev);
64 extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev);
65 extern void cik_update_cg(struct radeon_device *rdev,
251 static struct kv_power_info *kv_get_pi(struct radeon_device *rdev) in kv_get_pi() argument
253 struct kv_power_info *pi = rdev->pm.dpm.priv; in kv_get_pi()
259 static void kv_program_local_cac_table(struct radeon_device *rdev,
284 static int kv_program_pt_config_registers(struct radeon_device *rdev, in kv_program_pt_config_registers() argument
333 static void kv_do_enable_didt(struct radeon_device *rdev, bool enable) in kv_do_enable_didt() argument
335 struct kv_power_info *pi = kv_get_pi(rdev); in kv_do_enable_didt()
375 static int kv_enable_didt(struct radeon_device *rdev, bool enable) in kv_enable_didt() argument
377 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_didt()
384 cik_enter_rlc_safe_mode(rdev); in kv_enable_didt()
387 ret = kv_program_pt_config_registers(rdev, didt_config_kv); in kv_enable_didt()
389 cik_exit_rlc_safe_mode(rdev); in kv_enable_didt()
394 kv_do_enable_didt(rdev, enable); in kv_enable_didt()
396 cik_exit_rlc_safe_mode(rdev); in kv_enable_didt()
403 static void kv_initialize_hardware_cac_manager(struct radeon_device *rdev)
405 struct kv_power_info *pi = kv_get_pi(rdev);
410 kv_program_local_cac_table(rdev, sx_local_cac_cfg_kv, sx0_cac_config_reg);
414 kv_program_local_cac_table(rdev, mc0_local_cac_cfg_kv, mc0_cac_config_reg);
418 kv_program_local_cac_table(rdev, mc1_local_cac_cfg_kv, mc1_cac_config_reg);
422 kv_program_local_cac_table(rdev, mc2_local_cac_cfg_kv, mc2_cac_config_reg);
426 kv_program_local_cac_table(rdev, mc3_local_cac_cfg_kv, mc3_cac_config_reg);
430 kv_program_local_cac_table(rdev, cpl_local_cac_cfg_kv, cpl_cac_config_reg);
435 static int kv_enable_smc_cac(struct radeon_device *rdev, bool enable) in kv_enable_smc_cac() argument
437 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_smc_cac()
442 ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_EnableCac); in kv_enable_smc_cac()
448 kv_notify_message_to_smu(rdev, PPSMC_MSG_DisableCac); in kv_enable_smc_cac()
456 static int kv_process_firmware_header(struct radeon_device *rdev) in kv_process_firmware_header() argument
458 struct kv_power_info *pi = kv_get_pi(rdev); in kv_process_firmware_header()
462 ret = kv_read_smc_sram_dword(rdev, SMU7_FIRMWARE_HEADER_LOCATION + in kv_process_firmware_header()
469 ret = kv_read_smc_sram_dword(rdev, SMU7_FIRMWARE_HEADER_LOCATION + in kv_process_firmware_header()
479 static int kv_enable_dpm_voltage_scaling(struct radeon_device *rdev) in kv_enable_dpm_voltage_scaling() argument
481 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_dpm_voltage_scaling()
486 ret = kv_copy_bytes_to_smc(rdev, in kv_enable_dpm_voltage_scaling()
495 static int kv_set_dpm_interval(struct radeon_device *rdev) in kv_set_dpm_interval() argument
497 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_dpm_interval()
502 ret = kv_copy_bytes_to_smc(rdev, in kv_set_dpm_interval()
511 static int kv_set_dpm_boot_state(struct radeon_device *rdev) in kv_set_dpm_boot_state() argument
513 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_dpm_boot_state()
516 ret = kv_copy_bytes_to_smc(rdev, in kv_set_dpm_boot_state()
525 static void kv_program_vc(struct radeon_device *rdev) in kv_program_vc() argument
530 static void kv_clear_vc(struct radeon_device *rdev) in kv_clear_vc() argument
535 static int kv_set_divider_value(struct radeon_device *rdev, in kv_set_divider_value() argument
538 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_divider_value()
542 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_set_divider_value()
553 static u32 kv_convert_vid2_to_vid7(struct radeon_device *rdev, in kv_convert_vid2_to_vid7() argument
558 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid2_to_vid7()
575 static u32 kv_convert_vid7_to_vid2(struct radeon_device *rdev, in kv_convert_vid7_to_vid2() argument
580 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid7_to_vid2()
599 static u16 kv_convert_8bit_index_to_voltage(struct radeon_device *rdev, in kv_convert_8bit_index_to_voltage() argument
605 static u16 kv_convert_2bit_index_to_voltage(struct radeon_device *rdev, in kv_convert_2bit_index_to_voltage() argument
608 struct kv_power_info *pi = kv_get_pi(rdev); in kv_convert_2bit_index_to_voltage()
609 u32 vid_8bit = kv_convert_vid2_to_vid7(rdev, in kv_convert_2bit_index_to_voltage()
613 return kv_convert_8bit_index_to_voltage(rdev, (u16)vid_8bit); in kv_convert_2bit_index_to_voltage()
617 static int kv_set_vid(struct radeon_device *rdev, u32 index, u32 vid) in kv_set_vid() argument
619 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_vid()
623 cpu_to_be32(kv_convert_2bit_index_to_voltage(rdev, vid)); in kv_set_vid()
628 static int kv_set_at(struct radeon_device *rdev, u32 index, u32 at) in kv_set_at() argument
630 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_at()
637 static void kv_dpm_power_level_enable(struct radeon_device *rdev, in kv_dpm_power_level_enable() argument
640 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_power_level_enable()
645 static void kv_start_dpm(struct radeon_device *rdev) in kv_start_dpm() argument
652 kv_smc_dpm_enable(rdev, true); in kv_start_dpm()
655 static void kv_stop_dpm(struct radeon_device *rdev) in kv_stop_dpm() argument
657 kv_smc_dpm_enable(rdev, false); in kv_stop_dpm()
660 static void kv_start_am(struct radeon_device *rdev) in kv_start_am() argument
670 static void kv_reset_am(struct radeon_device *rdev) in kv_reset_am() argument
679 static int kv_freeze_sclk_dpm(struct radeon_device *rdev, bool freeze) in kv_freeze_sclk_dpm() argument
681 return kv_notify_message_to_smu(rdev, freeze ? in kv_freeze_sclk_dpm()
685 static int kv_force_lowest_valid(struct radeon_device *rdev) in kv_force_lowest_valid() argument
687 return kv_force_dpm_lowest(rdev); in kv_force_lowest_valid()
690 static int kv_unforce_levels(struct radeon_device *rdev) in kv_unforce_levels() argument
692 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_unforce_levels()
693 return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel); in kv_unforce_levels()
695 return kv_set_enabled_levels(rdev); in kv_unforce_levels()
698 static int kv_update_sclk_t(struct radeon_device *rdev) in kv_update_sclk_t() argument
700 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_sclk_t()
707 ret = kv_copy_bytes_to_smc(rdev, in kv_update_sclk_t()
716 static int kv_program_bootup_state(struct radeon_device *rdev) in kv_program_bootup_state() argument
718 struct kv_power_info *pi = kv_get_pi(rdev); in kv_program_bootup_state()
721 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_program_bootup_state()
730 kv_dpm_power_level_enable(rdev, i, true); in kv_program_bootup_state()
744 kv_dpm_power_level_enable(rdev, i, true); in kv_program_bootup_state()
749 static int kv_enable_auto_thermal_throttling(struct radeon_device *rdev) in kv_enable_auto_thermal_throttling() argument
751 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_auto_thermal_throttling()
756 ret = kv_copy_bytes_to_smc(rdev, in kv_enable_auto_thermal_throttling()
765 static int kv_upload_dpm_settings(struct radeon_device *rdev) in kv_upload_dpm_settings() argument
767 struct kv_power_info *pi = kv_get_pi(rdev); in kv_upload_dpm_settings()
770 ret = kv_copy_bytes_to_smc(rdev, in kv_upload_dpm_settings()
780 ret = kv_copy_bytes_to_smc(rdev, in kv_upload_dpm_settings()
794 static u32 kv_get_clk_bypass(struct radeon_device *rdev, u32 clk) in kv_get_clk_bypass() argument
796 struct kv_power_info *pi = kv_get_pi(rdev); in kv_get_clk_bypass()
819 static int kv_populate_uvd_table(struct radeon_device *rdev) in kv_populate_uvd_table() argument
821 struct kv_power_info *pi = kv_get_pi(rdev); in kv_populate_uvd_table()
823 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()
842 (u8)kv_get_clk_bypass(rdev, table->entries[i].vclk); in kv_populate_uvd_table()
844 (u8)kv_get_clk_bypass(rdev, table->entries[i].dclk); in kv_populate_uvd_table()
846 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_populate_uvd_table()
852 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_populate_uvd_table()
861 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_uvd_table()
871 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_uvd_table()
879 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_uvd_table()
890 static int kv_populate_vce_table(struct radeon_device *rdev) in kv_populate_vce_table() argument
892 struct kv_power_info *pi = kv_get_pi(rdev); in kv_populate_vce_table()
896 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_populate_vce_table()
912 (u8)kv_get_clk_bypass(rdev, table->entries[i].evclk); in kv_populate_vce_table()
914 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_populate_vce_table()
923 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_vce_table()
934 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_vce_table()
943 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_vce_table()
953 static int kv_populate_samu_table(struct radeon_device *rdev) in kv_populate_samu_table() argument
955 struct kv_power_info *pi = kv_get_pi(rdev); in kv_populate_samu_table()
957 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_populate_samu_table()
975 (u8)kv_get_clk_bypass(rdev, table->entries[i].clk); in kv_populate_samu_table()
977 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_populate_samu_table()
986 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_samu_table()
997 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_samu_table()
1006 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_samu_table()
1019 static int kv_populate_acp_table(struct radeon_device *rdev) in kv_populate_acp_table() argument
1021 struct kv_power_info *pi = kv_get_pi(rdev); in kv_populate_acp_table()
1023 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_populate_acp_table()
1036 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, in kv_populate_acp_table()
1045 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_acp_table()
1056 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_acp_table()
1065 ret = kv_copy_bytes_to_smc(rdev, in kv_populate_acp_table()
1077 static void kv_calculate_dfs_bypass_settings(struct radeon_device *rdev) in kv_calculate_dfs_bypass_settings() argument
1079 struct kv_power_info *pi = kv_get_pi(rdev); in kv_calculate_dfs_bypass_settings()
1082 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_calculate_dfs_bypass_settings()
1127 static int kv_enable_ulv(struct radeon_device *rdev, bool enable) in kv_enable_ulv() argument
1129 return kv_notify_message_to_smu(rdev, enable ? in kv_enable_ulv()
1133 static void kv_reset_acp_boot_level(struct radeon_device *rdev) in kv_reset_acp_boot_level() argument
1135 struct kv_power_info *pi = kv_get_pi(rdev); in kv_reset_acp_boot_level()
1140 static void kv_update_current_ps(struct radeon_device *rdev, in kv_update_current_ps() argument
1144 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_current_ps()
1151 static void kv_update_requested_ps(struct radeon_device *rdev, in kv_update_requested_ps() argument
1155 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_requested_ps()
1162 void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable) in kv_dpm_enable_bapm() argument
1164 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_enable_bapm()
1168 ret = kv_smc_bapm_enable(rdev, enable); in kv_dpm_enable_bapm()
1174 static void kv_enable_thermal_int(struct radeon_device *rdev, bool enable) in kv_enable_thermal_int() argument
1187 int kv_dpm_enable(struct radeon_device *rdev) in kv_dpm_enable() argument
1189 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_enable()
1192 ret = kv_process_firmware_header(rdev); in kv_dpm_enable()
1197 kv_init_fps_limits(rdev); in kv_dpm_enable()
1198 kv_init_graphics_levels(rdev); in kv_dpm_enable()
1199 ret = kv_program_bootup_state(rdev); in kv_dpm_enable()
1204 kv_calculate_dfs_bypass_settings(rdev); in kv_dpm_enable()
1205 ret = kv_upload_dpm_settings(rdev); in kv_dpm_enable()
1210 ret = kv_populate_uvd_table(rdev); in kv_dpm_enable()
1215 ret = kv_populate_vce_table(rdev); in kv_dpm_enable()
1220 ret = kv_populate_samu_table(rdev); in kv_dpm_enable()
1225 ret = kv_populate_acp_table(rdev); in kv_dpm_enable()
1230 kv_program_vc(rdev); in kv_dpm_enable()
1232 kv_initialize_hardware_cac_manager(rdev); in kv_dpm_enable()
1234 kv_start_am(rdev); in kv_dpm_enable()
1236 ret = kv_enable_auto_thermal_throttling(rdev); in kv_dpm_enable()
1242 ret = kv_enable_dpm_voltage_scaling(rdev); in kv_dpm_enable()
1247 ret = kv_set_dpm_interval(rdev); in kv_dpm_enable()
1252 ret = kv_set_dpm_boot_state(rdev); in kv_dpm_enable()
1257 ret = kv_enable_ulv(rdev, true); in kv_dpm_enable()
1262 kv_start_dpm(rdev); in kv_dpm_enable()
1263 ret = kv_enable_didt(rdev, true); in kv_dpm_enable()
1268 ret = kv_enable_smc_cac(rdev, true); in kv_dpm_enable()
1274 kv_reset_acp_boot_level(rdev); in kv_dpm_enable()
1276 ret = kv_smc_bapm_enable(rdev, false); in kv_dpm_enable()
1282 kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in kv_dpm_enable()
1287 int kv_dpm_late_enable(struct radeon_device *rdev) in kv_dpm_late_enable() argument
1291 if (rdev->irq.installed && in kv_dpm_late_enable()
1292 r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { in kv_dpm_late_enable()
1293 ret = kv_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); in kv_dpm_late_enable()
1298 kv_enable_thermal_int(rdev, true); in kv_dpm_late_enable()
1302 kv_dpm_powergate_acp(rdev, true); in kv_dpm_late_enable()
1303 kv_dpm_powergate_samu(rdev, true); in kv_dpm_late_enable()
1304 kv_dpm_powergate_vce(rdev, true); in kv_dpm_late_enable()
1305 kv_dpm_powergate_uvd(rdev, true); in kv_dpm_late_enable()
1310 void kv_dpm_disable(struct radeon_device *rdev) in kv_dpm_disable() argument
1312 kv_smc_bapm_enable(rdev, false); in kv_dpm_disable()
1314 if (rdev->family == CHIP_MULLINS) in kv_dpm_disable()
1315 kv_enable_nb_dpm(rdev, false); in kv_dpm_disable()
1318 kv_dpm_powergate_acp(rdev, false); in kv_dpm_disable()
1319 kv_dpm_powergate_samu(rdev, false); in kv_dpm_disable()
1320 kv_dpm_powergate_vce(rdev, false); in kv_dpm_disable()
1321 kv_dpm_powergate_uvd(rdev, false); in kv_dpm_disable()
1323 kv_enable_smc_cac(rdev, false); in kv_dpm_disable()
1324 kv_enable_didt(rdev, false); in kv_dpm_disable()
1325 kv_clear_vc(rdev); in kv_dpm_disable()
1326 kv_stop_dpm(rdev); in kv_dpm_disable()
1327 kv_enable_ulv(rdev, false); in kv_dpm_disable()
1328 kv_reset_am(rdev); in kv_dpm_disable()
1329 kv_enable_thermal_int(rdev, false); in kv_dpm_disable()
1331 kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in kv_dpm_disable()
1335 static int kv_write_smc_soft_register(struct radeon_device *rdev,
1338 struct kv_power_info *pi = kv_get_pi(rdev);
1340 return kv_copy_bytes_to_smc(rdev, pi->soft_regs_start + reg_offset,
1344 static int kv_read_smc_soft_register(struct radeon_device *rdev,
1347 struct kv_power_info *pi = kv_get_pi(rdev);
1349 return kv_read_smc_sram_dword(rdev, pi->soft_regs_start + reg_offset,
1354 static void kv_init_sclk_t(struct radeon_device *rdev) in kv_init_sclk_t() argument
1356 struct kv_power_info *pi = kv_get_pi(rdev); in kv_init_sclk_t()
1361 static int kv_init_fps_limits(struct radeon_device *rdev) in kv_init_fps_limits() argument
1363 struct kv_power_info *pi = kv_get_pi(rdev); in kv_init_fps_limits()
1371 ret = kv_copy_bytes_to_smc(rdev, in kv_init_fps_limits()
1380 ret = kv_copy_bytes_to_smc(rdev, in kv_init_fps_limits()
1390 static void kv_init_powergate_state(struct radeon_device *rdev) in kv_init_powergate_state() argument
1392 struct kv_power_info *pi = kv_get_pi(rdev); in kv_init_powergate_state()
1401 static int kv_enable_uvd_dpm(struct radeon_device *rdev, bool enable) in kv_enable_uvd_dpm() argument
1403 return kv_notify_message_to_smu(rdev, enable ? in kv_enable_uvd_dpm()
1407 static int kv_enable_vce_dpm(struct radeon_device *rdev, bool enable) in kv_enable_vce_dpm() argument
1409 return kv_notify_message_to_smu(rdev, enable ? in kv_enable_vce_dpm()
1413 static int kv_enable_samu_dpm(struct radeon_device *rdev, bool enable) in kv_enable_samu_dpm() argument
1415 return kv_notify_message_to_smu(rdev, enable ? in kv_enable_samu_dpm()
1419 static int kv_enable_acp_dpm(struct radeon_device *rdev, bool enable) in kv_enable_acp_dpm() argument
1421 return kv_notify_message_to_smu(rdev, enable ? in kv_enable_acp_dpm()
1425 static int kv_update_uvd_dpm(struct radeon_device *rdev, bool gate) in kv_update_uvd_dpm() argument
1427 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_uvd_dpm()
1429 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_update_uvd_dpm()
1445 ret = kv_copy_bytes_to_smc(rdev, in kv_update_uvd_dpm()
1453 kv_send_msg_to_smc_with_parameter(rdev, in kv_update_uvd_dpm()
1458 return kv_enable_uvd_dpm(rdev, !gate); in kv_update_uvd_dpm()
1461 static u8 kv_get_vce_boot_level(struct radeon_device *rdev, u32 evclk) in kv_get_vce_boot_level() argument
1465 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_get_vce_boot_level()
1475 static int kv_update_vce_dpm(struct radeon_device *rdev, in kv_update_vce_dpm() argument
1479 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_vce_dpm()
1481 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_update_vce_dpm()
1485 kv_dpm_powergate_vce(rdev, false); in kv_update_vce_dpm()
1487 cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false); in kv_update_vce_dpm()
1491 pi->vce_boot_level = kv_get_vce_boot_level(rdev, radeon_new_state->evclk); in kv_update_vce_dpm()
1493 ret = kv_copy_bytes_to_smc(rdev, in kv_update_vce_dpm()
1503 kv_send_msg_to_smc_with_parameter(rdev, in kv_update_vce_dpm()
1507 kv_enable_vce_dpm(rdev, true); in kv_update_vce_dpm()
1509 kv_enable_vce_dpm(rdev, false); in kv_update_vce_dpm()
1511 cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true); in kv_update_vce_dpm()
1512 kv_dpm_powergate_vce(rdev, true); in kv_update_vce_dpm()
1518 static int kv_update_samu_dpm(struct radeon_device *rdev, bool gate) in kv_update_samu_dpm() argument
1520 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_samu_dpm()
1522 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_update_samu_dpm()
1531 ret = kv_copy_bytes_to_smc(rdev, in kv_update_samu_dpm()
1541 kv_send_msg_to_smc_with_parameter(rdev, in kv_update_samu_dpm()
1546 return kv_enable_samu_dpm(rdev, !gate); in kv_update_samu_dpm()
1549 static u8 kv_get_acp_boot_level(struct radeon_device *rdev) in kv_get_acp_boot_level() argument
1553 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_get_acp_boot_level()
1566 static void kv_update_acp_boot_level(struct radeon_device *rdev) in kv_update_acp_boot_level() argument
1568 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_acp_boot_level()
1572 acp_boot_level = kv_get_acp_boot_level(rdev); in kv_update_acp_boot_level()
1575 kv_send_msg_to_smc_with_parameter(rdev, in kv_update_acp_boot_level()
1582 static int kv_update_acp_dpm(struct radeon_device *rdev, bool gate) in kv_update_acp_dpm() argument
1584 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_acp_dpm()
1586 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_update_acp_dpm()
1593 pi->acp_boot_level = kv_get_acp_boot_level(rdev); in kv_update_acp_dpm()
1595 ret = kv_copy_bytes_to_smc(rdev, in kv_update_acp_dpm()
1605 kv_send_msg_to_smc_with_parameter(rdev, in kv_update_acp_dpm()
1610 return kv_enable_acp_dpm(rdev, !gate); in kv_update_acp_dpm()
1613 void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate) in kv_dpm_powergate_uvd() argument
1615 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_powergate_uvd()
1624 uvd_v1_0_stop(rdev); in kv_dpm_powergate_uvd()
1625 cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false); in kv_dpm_powergate_uvd()
1627 kv_update_uvd_dpm(rdev, gate); in kv_dpm_powergate_uvd()
1629 kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerOFF); in kv_dpm_powergate_uvd()
1632 kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerON); in kv_dpm_powergate_uvd()
1633 uvd_v4_2_resume(rdev); in kv_dpm_powergate_uvd()
1634 uvd_v1_0_start(rdev); in kv_dpm_powergate_uvd()
1635 cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true); in kv_dpm_powergate_uvd()
1637 kv_update_uvd_dpm(rdev, gate); in kv_dpm_powergate_uvd()
1641 static void kv_dpm_powergate_vce(struct radeon_device *rdev, bool gate) in kv_dpm_powergate_vce() argument
1643 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_powergate_vce()
1653 kv_notify_message_to_smu(rdev, PPSMC_MSG_VCEPowerOFF); in kv_dpm_powergate_vce()
1657 kv_notify_message_to_smu(rdev, PPSMC_MSG_VCEPowerON); in kv_dpm_powergate_vce()
1658 vce_v2_0_resume(rdev); in kv_dpm_powergate_vce()
1659 vce_v1_0_start(rdev); in kv_dpm_powergate_vce()
1664 static void kv_dpm_powergate_samu(struct radeon_device *rdev, bool gate) in kv_dpm_powergate_samu() argument
1666 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_powergate_samu()
1674 kv_update_samu_dpm(rdev, true); in kv_dpm_powergate_samu()
1676 kv_notify_message_to_smu(rdev, PPSMC_MSG_SAMPowerOFF); in kv_dpm_powergate_samu()
1679 kv_notify_message_to_smu(rdev, PPSMC_MSG_SAMPowerON); in kv_dpm_powergate_samu()
1680 kv_update_samu_dpm(rdev, false); in kv_dpm_powergate_samu()
1684 static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate) in kv_dpm_powergate_acp() argument
1686 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_powergate_acp()
1691 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_dpm_powergate_acp()
1697 kv_update_acp_dpm(rdev, true); in kv_dpm_powergate_acp()
1699 kv_notify_message_to_smu(rdev, PPSMC_MSG_ACPPowerOFF); in kv_dpm_powergate_acp()
1702 kv_notify_message_to_smu(rdev, PPSMC_MSG_ACPPowerON); in kv_dpm_powergate_acp()
1703 kv_update_acp_dpm(rdev, false); in kv_dpm_powergate_acp()
1707 static void kv_set_valid_clock_range(struct radeon_device *rdev, in kv_set_valid_clock_range() argument
1711 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_valid_clock_range()
1714 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_set_valid_clock_range()
1769 static int kv_update_dfs_bypass_settings(struct radeon_device *rdev, in kv_update_dfs_bypass_settings() argument
1773 struct kv_power_info *pi = kv_get_pi(rdev); in kv_update_dfs_bypass_settings()
1780 ret = kv_copy_bytes_to_smc(rdev, in kv_update_dfs_bypass_settings()
1792 static int kv_enable_nb_dpm(struct radeon_device *rdev, in kv_enable_nb_dpm() argument
1795 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_nb_dpm()
1800 ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Enable); in kv_enable_nb_dpm()
1806 ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Disable); in kv_enable_nb_dpm()
1815 int kv_dpm_force_performance_level(struct radeon_device *rdev, in kv_dpm_force_performance_level() argument
1821 ret = kv_force_dpm_highest(rdev); in kv_dpm_force_performance_level()
1825 ret = kv_force_dpm_lowest(rdev); in kv_dpm_force_performance_level()
1829 ret = kv_unforce_levels(rdev); in kv_dpm_force_performance_level()
1834 rdev->pm.dpm.forced_level = level; in kv_dpm_force_performance_level()
1839 int kv_dpm_pre_set_power_state(struct radeon_device *rdev) in kv_dpm_pre_set_power_state() argument
1841 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_pre_set_power_state()
1842 struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; in kv_dpm_pre_set_power_state()
1845 kv_update_requested_ps(rdev, new_ps); in kv_dpm_pre_set_power_state()
1847 kv_apply_state_adjust_rules(rdev, in kv_dpm_pre_set_power_state()
1854 int kv_dpm_set_power_state(struct radeon_device *rdev) in kv_dpm_set_power_state() argument
1856 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_set_power_state()
1862 ret = kv_smc_bapm_enable(rdev, rdev->pm.dpm.ac_power); in kv_dpm_set_power_state()
1869 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { in kv_dpm_set_power_state()
1871 kv_set_valid_clock_range(rdev, new_ps); in kv_dpm_set_power_state()
1872 kv_update_dfs_bypass_settings(rdev, new_ps); in kv_dpm_set_power_state()
1873 ret = kv_calculate_ds_divider(rdev); in kv_dpm_set_power_state()
1878 kv_calculate_nbps_level_settings(rdev); in kv_dpm_set_power_state()
1879 kv_calculate_dpm_settings(rdev); in kv_dpm_set_power_state()
1880 kv_force_lowest_valid(rdev); in kv_dpm_set_power_state()
1881 kv_enable_new_levels(rdev); in kv_dpm_set_power_state()
1882 kv_upload_dpm_settings(rdev); in kv_dpm_set_power_state()
1883 kv_program_nbps_index_settings(rdev, new_ps); in kv_dpm_set_power_state()
1884 kv_unforce_levels(rdev); in kv_dpm_set_power_state()
1885 kv_set_enabled_levels(rdev); in kv_dpm_set_power_state()
1886 kv_force_lowest_valid(rdev); in kv_dpm_set_power_state()
1887 kv_unforce_levels(rdev); in kv_dpm_set_power_state()
1889 ret = kv_update_vce_dpm(rdev, new_ps, old_ps); in kv_dpm_set_power_state()
1894 kv_update_sclk_t(rdev); in kv_dpm_set_power_state()
1895 if (rdev->family == CHIP_MULLINS) in kv_dpm_set_power_state()
1896 kv_enable_nb_dpm(rdev, true); in kv_dpm_set_power_state()
1900 kv_set_valid_clock_range(rdev, new_ps); in kv_dpm_set_power_state()
1901 kv_update_dfs_bypass_settings(rdev, new_ps); in kv_dpm_set_power_state()
1902 ret = kv_calculate_ds_divider(rdev); in kv_dpm_set_power_state()
1907 kv_calculate_nbps_level_settings(rdev); in kv_dpm_set_power_state()
1908 kv_calculate_dpm_settings(rdev); in kv_dpm_set_power_state()
1909 kv_freeze_sclk_dpm(rdev, true); in kv_dpm_set_power_state()
1910 kv_upload_dpm_settings(rdev); in kv_dpm_set_power_state()
1911 kv_program_nbps_index_settings(rdev, new_ps); in kv_dpm_set_power_state()
1912 kv_freeze_sclk_dpm(rdev, false); in kv_dpm_set_power_state()
1913 kv_set_enabled_levels(rdev); in kv_dpm_set_power_state()
1914 ret = kv_update_vce_dpm(rdev, new_ps, old_ps); in kv_dpm_set_power_state()
1919 kv_update_acp_boot_level(rdev); in kv_dpm_set_power_state()
1920 kv_update_sclk_t(rdev); in kv_dpm_set_power_state()
1921 kv_enable_nb_dpm(rdev, true); in kv_dpm_set_power_state()
1928 void kv_dpm_post_set_power_state(struct radeon_device *rdev) in kv_dpm_post_set_power_state() argument
1930 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_post_set_power_state()
1933 kv_update_current_ps(rdev, new_ps); in kv_dpm_post_set_power_state()
1936 void kv_dpm_setup_asic(struct radeon_device *rdev) in kv_dpm_setup_asic() argument
1938 sumo_take_smu_control(rdev, true); in kv_dpm_setup_asic()
1939 kv_init_powergate_state(rdev); in kv_dpm_setup_asic()
1940 kv_init_sclk_t(rdev); in kv_dpm_setup_asic()
1944 void kv_dpm_reset_asic(struct radeon_device *rdev)
1946 struct kv_power_info *pi = kv_get_pi(rdev);
1948 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {
1949 kv_force_lowest_valid(rdev);
1950 kv_init_graphics_levels(rdev);
1951 kv_program_bootup_state(rdev);
1952 kv_upload_dpm_settings(rdev);
1953 kv_force_lowest_valid(rdev);
1954 kv_unforce_levels(rdev);
1956 kv_init_graphics_levels(rdev);
1957 kv_program_bootup_state(rdev);
1958 kv_freeze_sclk_dpm(rdev, true);
1959 kv_upload_dpm_settings(rdev);
1960 kv_freeze_sclk_dpm(rdev, false);
1961 kv_set_enabled_level(rdev, pi->graphics_boot_level);
1968 static void kv_construct_max_power_limits_table(struct radeon_device *rdev, in kv_construct_max_power_limits_table() argument
1971 struct kv_power_info *pi = kv_get_pi(rdev); in kv_construct_max_power_limits_table()
1978 kv_convert_2bit_index_to_voltage(rdev, in kv_construct_max_power_limits_table()
1985 static void kv_patch_voltage_values(struct radeon_device *rdev) in kv_patch_voltage_values() argument
1989 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_patch_voltage_values()
1991 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_patch_voltage_values()
1993 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_patch_voltage_values()
1995 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_patch_voltage_values()
2000 kv_convert_8bit_index_to_voltage(rdev, in kv_patch_voltage_values()
2007 kv_convert_8bit_index_to_voltage(rdev, in kv_patch_voltage_values()
2014 kv_convert_8bit_index_to_voltage(rdev, in kv_patch_voltage_values()
2021 kv_convert_8bit_index_to_voltage(rdev, in kv_patch_voltage_values()
2027 static void kv_construct_boot_state(struct radeon_device *rdev) in kv_construct_boot_state() argument
2029 struct kv_power_info *pi = kv_get_pi(rdev); in kv_construct_boot_state()
2041 static int kv_force_dpm_highest(struct radeon_device *rdev) in kv_force_dpm_highest() argument
2046 ret = kv_dpm_get_enable_mask(rdev, &enable_mask); in kv_force_dpm_highest()
2055 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_force_dpm_highest()
2056 return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); in kv_force_dpm_highest()
2058 return kv_set_enabled_level(rdev, i); in kv_force_dpm_highest()
2061 static int kv_force_dpm_lowest(struct radeon_device *rdev) in kv_force_dpm_lowest() argument
2066 ret = kv_dpm_get_enable_mask(rdev, &enable_mask); in kv_force_dpm_lowest()
2075 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_force_dpm_lowest()
2076 return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); in kv_force_dpm_lowest()
2078 return kv_set_enabled_level(rdev, i); in kv_force_dpm_lowest()
2081 static u8 kv_get_sleep_divider_id_from_clock(struct radeon_device *rdev, in kv_get_sleep_divider_id_from_clock() argument
2084 struct kv_power_info *pi = kv_get_pi(rdev); in kv_get_sleep_divider_id_from_clock()
2105 static int kv_get_high_voltage_limit(struct radeon_device *rdev, int *limit) in kv_get_high_voltage_limit() argument
2107 struct kv_power_info *pi = kv_get_pi(rdev); in kv_get_high_voltage_limit()
2109 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_get_high_voltage_limit()
2115 (kv_convert_8bit_index_to_voltage(rdev, table->entries[i].v) <= in kv_get_high_voltage_limit()
2127 (kv_convert_2bit_index_to_voltage(rdev, table->entries[i].vid_2bit) <= in kv_get_high_voltage_limit()
2139 static void kv_apply_state_adjust_rules(struct radeon_device *rdev, in kv_apply_state_adjust_rules() argument
2144 struct kv_power_info *pi = kv_get_pi(rdev); in kv_apply_state_adjust_rules()
2150 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_apply_state_adjust_rules()
2153 &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in kv_apply_state_adjust_rules()
2156 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()
2157 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()
2183 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in kv_apply_state_adjust_rules()
2184 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in kv_apply_state_adjust_rules()
2198 kv_convert_8bit_index_to_voltage(rdev, ps->levels[i].vddc_index))) { in kv_apply_state_adjust_rules()
2199 kv_get_high_voltage_limit(rdev, &limit); in kv_apply_state_adjust_rules()
2210 kv_convert_8bit_index_to_voltage(rdev, ps->levels[i].vddc_index))) { in kv_apply_state_adjust_rules()
2211 kv_get_high_voltage_limit(rdev, &limit); in kv_apply_state_adjust_rules()
2232 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { in kv_apply_state_adjust_rules()
2245 pi->video_start || (rdev->pm.dpm.new_active_crtc_count >= 3) || in kv_apply_state_adjust_rules()
2255 static void kv_dpm_power_level_enabled_for_throttle(struct radeon_device *rdev, in kv_dpm_power_level_enabled_for_throttle() argument
2258 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_power_level_enabled_for_throttle()
2263 static int kv_calculate_ds_divider(struct radeon_device *rdev) in kv_calculate_ds_divider() argument
2265 struct kv_power_info *pi = kv_get_pi(rdev); in kv_calculate_ds_divider()
2274 kv_get_sleep_divider_id_from_clock(rdev, in kv_calculate_ds_divider()
2281 static int kv_calculate_nbps_level_settings(struct radeon_device *rdev) in kv_calculate_nbps_level_settings() argument
2283 struct kv_power_info *pi = kv_get_pi(rdev); in kv_calculate_nbps_level_settings()
2287 &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in kv_calculate_nbps_level_settings()
2293 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { in kv_calculate_nbps_level_settings()
2304 (rdev->pm.dpm.new_active_crtc_count >= 3) || pi->video_start); in kv_calculate_nbps_level_settings()
2335 static int kv_calculate_dpm_settings(struct radeon_device *rdev) in kv_calculate_dpm_settings() argument
2337 struct kv_power_info *pi = kv_get_pi(rdev); in kv_calculate_dpm_settings()
2349 static void kv_init_graphics_levels(struct radeon_device *rdev) in kv_init_graphics_levels() argument
2351 struct kv_power_info *pi = kv_get_pi(rdev); in kv_init_graphics_levels()
2354 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_init_graphics_levels()
2363 kv_convert_8bit_index_to_voltage(rdev, table->entries[i].v))) in kv_init_graphics_levels()
2366 kv_set_divider_value(rdev, i, table->entries[i].clk); in kv_init_graphics_levels()
2367 vid_2bit = kv_convert_vid7_to_vid2(rdev, in kv_init_graphics_levels()
2370 kv_set_vid(rdev, i, vid_2bit); in kv_init_graphics_levels()
2371 kv_set_at(rdev, i, pi->at[i]); in kv_init_graphics_levels()
2372 kv_dpm_power_level_enabled_for_throttle(rdev, i, true); in kv_init_graphics_levels()
2383 kv_convert_2bit_index_to_voltage(rdev, table->entries[i].vid_2bit)) in kv_init_graphics_levels()
2386 kv_set_divider_value(rdev, i, table->entries[i].sclk_frequency); in kv_init_graphics_levels()
2387 kv_set_vid(rdev, i, table->entries[i].vid_2bit); in kv_init_graphics_levels()
2388 kv_set_at(rdev, i, pi->at[i]); in kv_init_graphics_levels()
2389 kv_dpm_power_level_enabled_for_throttle(rdev, i, true); in kv_init_graphics_levels()
2395 kv_dpm_power_level_enable(rdev, i, false); in kv_init_graphics_levels()
2398 static void kv_enable_new_levels(struct radeon_device *rdev) in kv_enable_new_levels() argument
2400 struct kv_power_info *pi = kv_get_pi(rdev); in kv_enable_new_levels()
2405 kv_dpm_power_level_enable(rdev, i, true); in kv_enable_new_levels()
2409 static int kv_set_enabled_level(struct radeon_device *rdev, u32 level) in kv_set_enabled_level() argument
2413 return kv_send_msg_to_smc_with_parameter(rdev, in kv_set_enabled_level()
2418 static int kv_set_enabled_levels(struct radeon_device *rdev) in kv_set_enabled_levels() argument
2420 struct kv_power_info *pi = kv_get_pi(rdev); in kv_set_enabled_levels()
2426 return kv_send_msg_to_smc_with_parameter(rdev, in kv_set_enabled_levels()
2431 static void kv_program_nbps_index_settings(struct radeon_device *rdev, in kv_program_nbps_index_settings() argument
2435 struct kv_power_info *pi = kv_get_pi(rdev); in kv_program_nbps_index_settings()
2438 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_program_nbps_index_settings()
2453 static int kv_set_thermal_temperature_range(struct radeon_device *rdev, in kv_set_thermal_temperature_range() argument
2475 rdev->pm.dpm.thermal.min_temp = low_temp; in kv_set_thermal_temperature_range()
2476 rdev->pm.dpm.thermal.max_temp = high_temp; in kv_set_thermal_temperature_range()
2490 static int kv_parse_sys_info_table(struct radeon_device *rdev) in kv_parse_sys_info_table() argument
2492 struct kv_power_info *pi = kv_get_pi(rdev); in kv_parse_sys_info_table()
2493 struct radeon_mode_info *mode_info = &rdev->mode_info; in kv_parse_sys_info_table()
2540 sumo_construct_sclk_voltage_mapping_table(rdev, in kv_parse_sys_info_table()
2544 sumo_construct_vid_mapping_table(rdev, in kv_parse_sys_info_table()
2548 kv_construct_max_power_limits_table(rdev, in kv_parse_sys_info_table()
2549 &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac); in kv_parse_sys_info_table()
2575 static void kv_patch_boot_state(struct radeon_device *rdev, in kv_patch_boot_state() argument
2578 struct kv_power_info *pi = kv_get_pi(rdev); in kv_patch_boot_state()
2584 static void kv_parse_pplib_non_clock_info(struct radeon_device *rdev, in kv_parse_pplib_non_clock_info() argument
2604 rdev->pm.dpm.boot_ps = rps; in kv_parse_pplib_non_clock_info()
2605 kv_patch_boot_state(rdev, ps); in kv_parse_pplib_non_clock_info()
2608 rdev->pm.dpm.uvd_ps = rps; in kv_parse_pplib_non_clock_info()
2611 static void kv_parse_pplib_clock_info(struct radeon_device *rdev, in kv_parse_pplib_clock_info() argument
2615 struct kv_power_info *pi = kv_get_pi(rdev); in kv_parse_pplib_clock_info()
2633 static int kv_parse_power_table(struct radeon_device *rdev) in kv_parse_power_table() argument
2635 struct radeon_mode_info *mode_info = &rdev->mode_info; in kv_parse_power_table()
2665 rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, in kv_parse_power_table()
2668 if (!rdev->pm.dpm.ps) in kv_parse_power_table()
2677 if (!rdev->pm.power_state[i].clock_info) in kv_parse_power_table()
2681 kfree(rdev->pm.dpm.ps); in kv_parse_power_table()
2684 rdev->pm.dpm.ps[i].ps_priv = ps; in kv_parse_power_table()
2696 kv_parse_pplib_clock_info(rdev, in kv_parse_power_table()
2697 &rdev->pm.dpm.ps[i], k, in kv_parse_power_table()
2701 kv_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], in kv_parse_power_table()
2706 rdev->pm.dpm.num_ps = state_array->ucNumEntries; in kv_parse_power_table()
2711 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in kv_parse_power_table()
2716 rdev->pm.dpm.vce_states[i].sclk = sclk; in kv_parse_power_table()
2717 rdev->pm.dpm.vce_states[i].mclk = 0; in kv_parse_power_table()
2723 int kv_dpm_init(struct radeon_device *rdev) in kv_dpm_init() argument
2731 rdev->pm.dpm.priv = pi; in kv_dpm_init()
2733 ret = r600_get_platform_caps(rdev); in kv_dpm_init()
2737 ret = r600_parse_extended_power_table(rdev); in kv_dpm_init()
2747 if (rdev->pdev->subsystem_vendor == 0x1849) in kv_dpm_init()
2767 if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) in kv_dpm_init()
2786 ret = kv_parse_sys_info_table(rdev); in kv_dpm_init()
2790 kv_patch_voltage_values(rdev); in kv_dpm_init()
2791 kv_construct_boot_state(rdev); in kv_dpm_init()
2793 ret = kv_parse_power_table(rdev); in kv_dpm_init()
2802 void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, in kv_dpm_debugfs_print_current_performance_level() argument
2805 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_debugfs_print_current_performance_level()
2818 vddc = kv_convert_8bit_index_to_voltage(rdev, (u16)tmp); in kv_dpm_debugfs_print_current_performance_level()
2826 u32 kv_dpm_get_current_sclk(struct radeon_device *rdev) in kv_dpm_get_current_sclk() argument
2828 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_get_current_sclk()
2842 u32 kv_dpm_get_current_mclk(struct radeon_device *rdev) in kv_dpm_get_current_mclk() argument
2844 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_get_current_mclk()
2849 void kv_dpm_print_power_state(struct radeon_device *rdev, in kv_dpm_print_power_state() argument
2862 kv_convert_8bit_index_to_voltage(rdev, pl->vddc_index)); in kv_dpm_print_power_state()
2864 r600_dpm_print_ps_status(rdev, rps); in kv_dpm_print_power_state()
2867 void kv_dpm_fini(struct radeon_device *rdev) in kv_dpm_fini() argument
2871 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in kv_dpm_fini()
2872 kfree(rdev->pm.dpm.ps[i].ps_priv); in kv_dpm_fini()
2874 kfree(rdev->pm.dpm.ps); in kv_dpm_fini()
2875 kfree(rdev->pm.dpm.priv); in kv_dpm_fini()
2876 r600_free_extended_power_table(rdev); in kv_dpm_fini()
2879 void kv_dpm_display_configuration_changed(struct radeon_device *rdev) in kv_dpm_display_configuration_changed() argument
2884 u32 kv_dpm_get_sclk(struct radeon_device *rdev, bool low) in kv_dpm_get_sclk() argument
2886 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_get_sclk()
2895 u32 kv_dpm_get_mclk(struct radeon_device *rdev, bool low) in kv_dpm_get_mclk() argument
2897 struct kv_power_info *pi = kv_get_pi(rdev); in kv_dpm_get_mclk()