Lines Matching refs:dev
25 static void i2c_dw_configure_fifo_master(struct dw_i2c_dev *dev) in i2c_dw_configure_fifo_master() argument
28 dw_writel(dev, dev->tx_fifo_depth / 2, DW_IC_TX_TL); in i2c_dw_configure_fifo_master()
29 dw_writel(dev, 0, DW_IC_RX_TL); in i2c_dw_configure_fifo_master()
32 dw_writel(dev, dev->master_cfg, DW_IC_CON); in i2c_dw_configure_fifo_master()
35 static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev) in i2c_dw_set_timings_master() argument
40 struct i2c_timings *t = &dev->timings; in i2c_dw_set_timings_master()
44 ret = i2c_dw_acquire_lock(dev); in i2c_dw_set_timings_master()
47 comp_param1 = dw_readl(dev, DW_IC_COMP_PARAM_1); in i2c_dw_set_timings_master()
48 i2c_dw_release_lock(dev); in i2c_dw_set_timings_master()
55 if (!dev->ss_hcnt || !dev->ss_lcnt) { in i2c_dw_set_timings_master()
56 ic_clk = i2c_dw_clk_rate(dev); in i2c_dw_set_timings_master()
57 dev->ss_hcnt = in i2c_dw_set_timings_master()
63 dev->ss_lcnt = in i2c_dw_set_timings_master()
69 dev_dbg(dev->dev, "Standard Mode HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
70 dev->ss_hcnt, dev->ss_lcnt); in i2c_dw_set_timings_master()
82 if (dev->fp_hcnt && dev->fp_lcnt) { in i2c_dw_set_timings_master()
83 dev->fs_hcnt = dev->fp_hcnt; in i2c_dw_set_timings_master()
84 dev->fs_lcnt = dev->fp_lcnt; in i2c_dw_set_timings_master()
92 if (!dev->fs_hcnt || !dev->fs_lcnt) { in i2c_dw_set_timings_master()
93 ic_clk = i2c_dw_clk_rate(dev); in i2c_dw_set_timings_master()
94 dev->fs_hcnt = in i2c_dw_set_timings_master()
100 dev->fs_lcnt = in i2c_dw_set_timings_master()
106 dev_dbg(dev->dev, "Fast Mode%s HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
107 fp_str, dev->fs_hcnt, dev->fs_lcnt); in i2c_dw_set_timings_master()
110 if ((dev->master_cfg & DW_IC_CON_SPEED_MASK) == in i2c_dw_set_timings_master()
114 dev_err(dev->dev, "High Speed not supported!\n"); in i2c_dw_set_timings_master()
115 dev->master_cfg &= ~DW_IC_CON_SPEED_MASK; in i2c_dw_set_timings_master()
116 dev->master_cfg |= DW_IC_CON_SPEED_FAST; in i2c_dw_set_timings_master()
117 dev->hs_hcnt = 0; in i2c_dw_set_timings_master()
118 dev->hs_lcnt = 0; in i2c_dw_set_timings_master()
119 } else if (dev->hs_hcnt && dev->hs_lcnt) { in i2c_dw_set_timings_master()
120 dev_dbg(dev->dev, "High Speed Mode HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
121 dev->hs_hcnt, dev->hs_lcnt); in i2c_dw_set_timings_master()
125 ret = i2c_dw_set_sda_hold(dev); in i2c_dw_set_timings_master()
129 switch (dev->master_cfg & DW_IC_CON_SPEED_MASK) { in i2c_dw_set_timings_master()
139 dev_dbg(dev->dev, "Bus speed: %s%s\n", mode_str, fp_str); in i2c_dw_set_timings_master()
153 static int i2c_dw_init_master(struct dw_i2c_dev *dev) in i2c_dw_init_master() argument
157 ret = i2c_dw_acquire_lock(dev); in i2c_dw_init_master()
162 __i2c_dw_disable(dev); in i2c_dw_init_master()
165 dw_writel(dev, dev->ss_hcnt, DW_IC_SS_SCL_HCNT); in i2c_dw_init_master()
166 dw_writel(dev, dev->ss_lcnt, DW_IC_SS_SCL_LCNT); in i2c_dw_init_master()
169 dw_writel(dev, dev->fs_hcnt, DW_IC_FS_SCL_HCNT); in i2c_dw_init_master()
170 dw_writel(dev, dev->fs_lcnt, DW_IC_FS_SCL_LCNT); in i2c_dw_init_master()
173 if (dev->hs_hcnt && dev->hs_lcnt) { in i2c_dw_init_master()
174 dw_writel(dev, dev->hs_hcnt, DW_IC_HS_SCL_HCNT); in i2c_dw_init_master()
175 dw_writel(dev, dev->hs_lcnt, DW_IC_HS_SCL_LCNT); in i2c_dw_init_master()
179 if (dev->sda_hold_time) in i2c_dw_init_master()
180 dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD); in i2c_dw_init_master()
182 i2c_dw_configure_fifo_master(dev); in i2c_dw_init_master()
183 i2c_dw_release_lock(dev); in i2c_dw_init_master()
188 static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) in i2c_dw_xfer_init() argument
190 struct i2c_msg *msgs = dev->msgs; in i2c_dw_xfer_init()
194 __i2c_dw_disable(dev); in i2c_dw_xfer_init()
197 ic_con = dw_readl(dev, DW_IC_CON); in i2c_dw_xfer_init()
198 if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) { in i2c_dw_xfer_init()
211 dw_writel(dev, ic_con, DW_IC_CON); in i2c_dw_xfer_init()
217 dw_writel(dev, msgs[dev->msg_write_idx].addr | ic_tar, DW_IC_TAR); in i2c_dw_xfer_init()
220 i2c_dw_disable_int(dev); in i2c_dw_xfer_init()
223 __i2c_dw_enable(dev); in i2c_dw_xfer_init()
226 dw_readl(dev, DW_IC_ENABLE_STATUS); in i2c_dw_xfer_init()
229 dw_readl(dev, DW_IC_CLR_INTR); in i2c_dw_xfer_init()
230 dw_writel(dev, DW_IC_INTR_MASTER_MASK, DW_IC_INTR_MASK); in i2c_dw_xfer_init()
240 i2c_dw_xfer_msg(struct dw_i2c_dev *dev) in i2c_dw_xfer_msg() argument
242 struct i2c_msg *msgs = dev->msgs; in i2c_dw_xfer_msg()
245 u32 addr = msgs[dev->msg_write_idx].addr; in i2c_dw_xfer_msg()
246 u32 buf_len = dev->tx_buf_len; in i2c_dw_xfer_msg()
247 u8 *buf = dev->tx_buf; in i2c_dw_xfer_msg()
252 for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) { in i2c_dw_xfer_msg()
253 u32 flags = msgs[dev->msg_write_idx].flags; in i2c_dw_xfer_msg()
260 if (msgs[dev->msg_write_idx].addr != addr) { in i2c_dw_xfer_msg()
261 dev_err(dev->dev, in i2c_dw_xfer_msg()
263 dev->msg_err = -EINVAL; in i2c_dw_xfer_msg()
267 if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { in i2c_dw_xfer_msg()
269 buf = msgs[dev->msg_write_idx].buf; in i2c_dw_xfer_msg()
270 buf_len = msgs[dev->msg_write_idx].len; in i2c_dw_xfer_msg()
276 if ((dev->master_cfg & DW_IC_CON_RESTART_EN) && in i2c_dw_xfer_msg()
277 (dev->msg_write_idx > 0)) in i2c_dw_xfer_msg()
281 tx_limit = dev->tx_fifo_depth - dw_readl(dev, DW_IC_TXFLR); in i2c_dw_xfer_msg()
282 rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR); in i2c_dw_xfer_msg()
300 if (dev->msg_write_idx == dev->msgs_num - 1 && in i2c_dw_xfer_msg()
309 if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { in i2c_dw_xfer_msg()
312 if (dev->rx_outstanding >= dev->rx_fifo_depth) in i2c_dw_xfer_msg()
315 dw_writel(dev, cmd | 0x100, DW_IC_DATA_CMD); in i2c_dw_xfer_msg()
317 dev->rx_outstanding++; in i2c_dw_xfer_msg()
319 dw_writel(dev, cmd | *buf++, DW_IC_DATA_CMD); in i2c_dw_xfer_msg()
323 dev->tx_buf = buf; in i2c_dw_xfer_msg()
324 dev->tx_buf_len = buf_len; in i2c_dw_xfer_msg()
333 dev->status |= STATUS_WRITE_IN_PROGRESS; in i2c_dw_xfer_msg()
336 dev->status &= ~STATUS_WRITE_IN_PROGRESS; in i2c_dw_xfer_msg()
343 if (dev->msg_write_idx == dev->msgs_num) in i2c_dw_xfer_msg()
346 if (dev->msg_err) in i2c_dw_xfer_msg()
349 dw_writel(dev, intr_mask, DW_IC_INTR_MASK); in i2c_dw_xfer_msg()
353 i2c_dw_recv_len(struct dw_i2c_dev *dev, u8 len) in i2c_dw_recv_len() argument
355 struct i2c_msg *msgs = dev->msgs; in i2c_dw_recv_len()
356 u32 flags = msgs[dev->msg_read_idx].flags; in i2c_dw_recv_len()
363 dev->tx_buf_len = len - min_t(u8, len, dev->rx_outstanding); in i2c_dw_recv_len()
364 msgs[dev->msg_read_idx].len = len; in i2c_dw_recv_len()
365 msgs[dev->msg_read_idx].flags &= ~I2C_M_RECV_LEN; in i2c_dw_recv_len()
371 i2c_dw_read(struct dw_i2c_dev *dev) in i2c_dw_read() argument
373 struct i2c_msg *msgs = dev->msgs; in i2c_dw_read()
376 for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { in i2c_dw_read()
380 if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD)) in i2c_dw_read()
383 if (!(dev->status & STATUS_READ_IN_PROGRESS)) { in i2c_dw_read()
384 len = msgs[dev->msg_read_idx].len; in i2c_dw_read()
385 buf = msgs[dev->msg_read_idx].buf; in i2c_dw_read()
387 len = dev->rx_buf_len; in i2c_dw_read()
388 buf = dev->rx_buf; in i2c_dw_read()
391 rx_valid = dw_readl(dev, DW_IC_RXFLR); in i2c_dw_read()
394 u32 flags = msgs[dev->msg_read_idx].flags; in i2c_dw_read()
396 *buf = dw_readl(dev, DW_IC_DATA_CMD); in i2c_dw_read()
400 len = i2c_dw_recv_len(dev, *buf); in i2c_dw_read()
403 dev->rx_outstanding--; in i2c_dw_read()
407 dev->status |= STATUS_READ_IN_PROGRESS; in i2c_dw_read()
408 dev->rx_buf_len = len; in i2c_dw_read()
409 dev->rx_buf = buf; in i2c_dw_read()
412 dev->status &= ~STATUS_READ_IN_PROGRESS; in i2c_dw_read()
422 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in i2c_dw_xfer() local
425 dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); in i2c_dw_xfer()
427 pm_runtime_get_sync(dev->dev); in i2c_dw_xfer()
429 if (dev_WARN_ONCE(dev->dev, dev->suspended, "Transfer while suspended\n")) { in i2c_dw_xfer()
434 reinit_completion(&dev->cmd_complete); in i2c_dw_xfer()
435 dev->msgs = msgs; in i2c_dw_xfer()
436 dev->msgs_num = num; in i2c_dw_xfer()
437 dev->cmd_err = 0; in i2c_dw_xfer()
438 dev->msg_write_idx = 0; in i2c_dw_xfer()
439 dev->msg_read_idx = 0; in i2c_dw_xfer()
440 dev->msg_err = 0; in i2c_dw_xfer()
441 dev->status = STATUS_IDLE; in i2c_dw_xfer()
442 dev->abort_source = 0; in i2c_dw_xfer()
443 dev->rx_outstanding = 0; in i2c_dw_xfer()
445 ret = i2c_dw_acquire_lock(dev); in i2c_dw_xfer()
449 ret = i2c_dw_wait_bus_not_busy(dev); in i2c_dw_xfer()
454 i2c_dw_xfer_init(dev); in i2c_dw_xfer()
457 if (!wait_for_completion_timeout(&dev->cmd_complete, adap->timeout)) { in i2c_dw_xfer()
458 dev_err(dev->dev, "controller timed out\n"); in i2c_dw_xfer()
460 i2c_recover_bus(&dev->adapter); in i2c_dw_xfer()
461 i2c_dw_init_master(dev); in i2c_dw_xfer()
474 __i2c_dw_disable_nowait(dev); in i2c_dw_xfer()
476 if (dev->msg_err) { in i2c_dw_xfer()
477 ret = dev->msg_err; in i2c_dw_xfer()
482 if (likely(!dev->cmd_err && !dev->status)) { in i2c_dw_xfer()
488 if (dev->cmd_err == DW_IC_ERR_TX_ABRT) { in i2c_dw_xfer()
489 ret = i2c_dw_handle_tx_abort(dev); in i2c_dw_xfer()
493 if (dev->status) in i2c_dw_xfer()
494 dev_err(dev->dev, in i2c_dw_xfer()
500 i2c_dw_release_lock(dev); in i2c_dw_xfer()
503 pm_runtime_mark_last_busy(dev->dev); in i2c_dw_xfer()
504 pm_runtime_put_autosuspend(dev->dev); in i2c_dw_xfer()
518 static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) in i2c_dw_read_clear_intrbits() argument
534 stat = dw_readl(dev, DW_IC_INTR_STAT); in i2c_dw_read_clear_intrbits()
544 dw_readl(dev, DW_IC_CLR_RX_UNDER); in i2c_dw_read_clear_intrbits()
546 dw_readl(dev, DW_IC_CLR_RX_OVER); in i2c_dw_read_clear_intrbits()
548 dw_readl(dev, DW_IC_CLR_TX_OVER); in i2c_dw_read_clear_intrbits()
550 dw_readl(dev, DW_IC_CLR_RD_REQ); in i2c_dw_read_clear_intrbits()
556 dev->abort_source = dw_readl(dev, DW_IC_TX_ABRT_SOURCE); in i2c_dw_read_clear_intrbits()
557 dw_readl(dev, DW_IC_CLR_TX_ABRT); in i2c_dw_read_clear_intrbits()
560 dw_readl(dev, DW_IC_CLR_RX_DONE); in i2c_dw_read_clear_intrbits()
562 dw_readl(dev, DW_IC_CLR_ACTIVITY); in i2c_dw_read_clear_intrbits()
564 dw_readl(dev, DW_IC_CLR_STOP_DET); in i2c_dw_read_clear_intrbits()
566 dw_readl(dev, DW_IC_CLR_START_DET); in i2c_dw_read_clear_intrbits()
568 dw_readl(dev, DW_IC_CLR_GEN_CALL); in i2c_dw_read_clear_intrbits()
577 static int i2c_dw_irq_handler_master(struct dw_i2c_dev *dev) in i2c_dw_irq_handler_master() argument
581 stat = i2c_dw_read_clear_intrbits(dev); in i2c_dw_irq_handler_master()
583 dev->cmd_err |= DW_IC_ERR_TX_ABRT; in i2c_dw_irq_handler_master()
584 dev->status = STATUS_IDLE; in i2c_dw_irq_handler_master()
590 dw_writel(dev, 0, DW_IC_INTR_MASK); in i2c_dw_irq_handler_master()
595 i2c_dw_read(dev); in i2c_dw_irq_handler_master()
598 i2c_dw_xfer_msg(dev); in i2c_dw_irq_handler_master()
607 if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) in i2c_dw_irq_handler_master()
608 complete(&dev->cmd_complete); in i2c_dw_irq_handler_master()
609 else if (unlikely(dev->flags & ACCESS_INTR_MASK)) { in i2c_dw_irq_handler_master()
611 stat = dw_readl(dev, DW_IC_INTR_MASK); in i2c_dw_irq_handler_master()
612 i2c_dw_disable_int(dev); in i2c_dw_irq_handler_master()
613 dw_writel(dev, stat, DW_IC_INTR_MASK); in i2c_dw_irq_handler_master()
621 struct dw_i2c_dev *dev = dev_id; in i2c_dw_isr() local
624 enabled = dw_readl(dev, DW_IC_ENABLE); in i2c_dw_isr()
625 stat = dw_readl(dev, DW_IC_RAW_INTR_STAT); in i2c_dw_isr()
626 dev_dbg(dev->dev, "enabled=%#x stat=%#x\n", enabled, stat); in i2c_dw_isr()
630 i2c_dw_irq_handler_master(dev); in i2c_dw_isr()
637 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in i2c_dw_prepare_recovery() local
639 i2c_dw_disable(dev); in i2c_dw_prepare_recovery()
640 reset_control_assert(dev->rst); in i2c_dw_prepare_recovery()
641 i2c_dw_prepare_clk(dev, false); in i2c_dw_prepare_recovery()
646 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in i2c_dw_unprepare_recovery() local
648 i2c_dw_prepare_clk(dev, true); in i2c_dw_unprepare_recovery()
649 reset_control_deassert(dev->rst); in i2c_dw_unprepare_recovery()
650 i2c_dw_init_master(dev); in i2c_dw_unprepare_recovery()
653 static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev) in i2c_dw_init_recovery_info() argument
655 struct i2c_bus_recovery_info *rinfo = &dev->rinfo; in i2c_dw_init_recovery_info()
656 struct i2c_adapter *adap = &dev->adapter; in i2c_dw_init_recovery_info()
659 gpio = devm_gpiod_get_optional(dev->dev, "scl", GPIOD_OUT_HIGH); in i2c_dw_init_recovery_info()
665 gpio = devm_gpiod_get_optional(dev->dev, "sda", GPIOD_IN); in i2c_dw_init_recovery_info()
675 dev_info(dev->dev, "running with gpio recovery mode! scl%s", in i2c_dw_init_recovery_info()
681 int i2c_dw_probe(struct dw_i2c_dev *dev) in i2c_dw_probe() argument
683 struct i2c_adapter *adap = &dev->adapter; in i2c_dw_probe()
687 init_completion(&dev->cmd_complete); in i2c_dw_probe()
689 dev->init = i2c_dw_init_master; in i2c_dw_probe()
690 dev->disable = i2c_dw_disable; in i2c_dw_probe()
691 dev->disable_int = i2c_dw_disable_int; in i2c_dw_probe()
693 ret = i2c_dw_set_reg_access(dev); in i2c_dw_probe()
697 ret = i2c_dw_set_timings_master(dev); in i2c_dw_probe()
701 ret = dev->init(dev); in i2c_dw_probe()
710 adap->dev.parent = dev->dev; in i2c_dw_probe()
711 i2c_set_adapdata(adap, dev); in i2c_dw_probe()
713 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) { in i2c_dw_probe()
719 i2c_dw_disable_int(dev); in i2c_dw_probe()
720 ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr, irq_flags, in i2c_dw_probe()
721 dev_name(dev->dev), dev); in i2c_dw_probe()
723 dev_err(dev->dev, "failure requesting irq %i: %d\n", in i2c_dw_probe()
724 dev->irq, ret); in i2c_dw_probe()
728 ret = i2c_dw_init_recovery_info(dev); in i2c_dw_probe()
738 pm_runtime_get_noresume(dev->dev); in i2c_dw_probe()
741 dev_err(dev->dev, "failure adding adapter: %d\n", ret); in i2c_dw_probe()
742 pm_runtime_put_noidle(dev->dev); in i2c_dw_probe()