213 	u32 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_set_sd_power()  local
216 		reg_tmp &= ~BM_SD_OFF;  in wmt_set_sd_power()
218 		reg_tmp |= BM_SD_OFF;  in wmt_set_sd_power()
220 	writeb(reg_tmp, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_set_sd_power()
248 	u32 reg_tmp;  in wmt_mci_start_command()  local
250 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_start_command()
251 	writeb(reg_tmp | CTLR_CMD_START, priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_start_command()
258 	u32 reg_tmp;  in wmt_mci_send_command()  local
268 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
269 	writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
281 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
282 	writeb((reg_tmp & 0x0F) | (cmdtype << 4),  in wmt_mci_send_command()
376 	u32 reg_tmp;  in wmt_mci_regular_isr()  local
386 	reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_regular_isr()
387 	if ((reg_tmp & INT0_DI_INT_EN) && (status0 & STS0_DEVICE_INS)) {  in wmt_mci_regular_isr()
465 	u32 reg_tmp;  in wmt_reset_hardware()  local
470 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_reset_hardware()
471 	writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_reset_hardware()
474 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_reset_hardware()
475 	writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);  in wmt_reset_hardware()
494 	reg_tmp = readb(priv->sdmmc_base + SDMMC_STS2);  in wmt_reset_hardware()
495 	writeb(reg_tmp | STS2_DIS_FORCECLK, priv->sdmmc_base + SDMMC_STS2);  in wmt_reset_hardware()
528 	u32 reg_tmp;  in wmt_dma_config()  local
541 		reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_config()
542 		writel(reg_tmp & DMA_CCR_IF_TO_PERIPHERAL, priv->sdmmc_base +  in wmt_dma_config()
545 		reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_config()
546 		writel(reg_tmp | DMA_CCR_PERIPHERAL_TO_IF, priv->sdmmc_base +  in wmt_dma_config()
553 	u32 reg_tmp;  in wmt_dma_start()  local
555 	reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_start()
556 	writel(reg_tmp | DMA_CCR_RUN, priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_start()
567 	u32 reg_tmp;  in wmt_mci_request()  local
610 		reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_request()
611 		writew((reg_tmp & 0xF800) | (req->data->blksz - 1),  in wmt_mci_request()
886 	u32 reg_tmp;  in wmt_mci_remove()  local
892 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_remove()
893 	writel(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_remove()
894 	reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_remove()
895 	writew(reg_tmp & ~(0xA000), priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_remove()
926 	u32 reg_tmp;  in wmt_mci_suspend()  local
934 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_suspend()
935 	writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base +  in wmt_mci_suspend()
938 	reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_suspend()
939 	writew(reg_tmp & 0x5FFF, priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_suspend()
950 	u32 reg_tmp;  in wmt_mci_resume()  local
958 		reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_resume()
959 		writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base +  in wmt_mci_resume()
962 		reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_resume()
963 		writew(reg_tmp | (BLKL_GPI_CD | BLKL_INT_ENABLE),  in wmt_mci_resume()
966 		reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_resume()
967 		writeb(reg_tmp | INT0_DI_INT_EN, priv->sdmmc_base +  in wmt_mci_resume()