103 	u32 reg_val;  in elm_config()  local
121 	reg_val = (bch_type & ECC_BCH_LEVEL_MASK) | (ELM_ECC_SIZE << 16);  in elm_config()
122 	elm_write_reg(info, ELM_LOCATION_CONFIG, reg_val);  in elm_config()
142 	u32 reg_val;  in elm_configure_page_mode()  local
144 	reg_val = elm_read_reg(info, ELM_PAGE_CTRL);  in elm_configure_page_mode()
146 		reg_val |= BIT(index);	/* enable page mode */  in elm_configure_page_mode()
148 		reg_val &= ~BIT(index);	/* disable page mode */  in elm_configure_page_mode()
150 	elm_write_reg(info, ELM_PAGE_CTRL, reg_val);  in elm_configure_page_mode()
251 	u32 reg_val;  in elm_start_processing()  local
261 			reg_val = elm_read_reg(info, offset);  in elm_start_processing()
262 			reg_val |= ELM_SYNDROME_VALID;  in elm_start_processing()
263 			elm_write_reg(info, offset, reg_val);  in elm_start_processing()
284 	u32 reg_val;  in elm_error_correction()  local
291 			reg_val = elm_read_reg(info, offset);  in elm_error_correction()
294 			if (reg_val & ECC_CORRECTABLE_MASK) {  in elm_error_correction()
299 				err_vec[i].error_count = reg_val &  in elm_error_correction()
305 					reg_val = elm_read_reg(info, offset);  in elm_error_correction()
306 					err_vec[i].error_loc[j] = reg_val &  in elm_error_correction()
340 	u32 reg_val;  in elm_decode_bch_error_page()  local
343 	reg_val = elm_read_reg(info, ELM_IRQSTATUS);  in elm_decode_bch_error_page()
344 	elm_write_reg(info, ELM_IRQSTATUS, reg_val & INTR_STATUS_PAGE_VALID);  in elm_decode_bch_error_page()
357 	reg_val = elm_read_reg(info, ELM_IRQENABLE);  in elm_decode_bch_error_page()
358 	elm_write_reg(info, ELM_IRQENABLE, reg_val & ~INTR_EN_PAGE_MASK);  in elm_decode_bch_error_page()
365 	u32 reg_val;  in elm_isr()  local
368 	reg_val = elm_read_reg(info, ELM_IRQSTATUS);  in elm_isr()
371 	if (reg_val & INTR_STATUS_PAGE_VALID) {  in elm_isr()
373 				reg_val & INTR_STATUS_PAGE_VALID);  in elm_isr()