195 	tx_ring->q_vector->tx.total_bytes += total_bytes;  in ice_clean_tx_irq()
196 	tx_ring->q_vector->tx.total_pkts += total_pkts;  in ice_clean_tx_irq()
706 	skb = __napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE,  in ice_construct_skb()
990 	napi_gro_receive(&rx_ring->q_vector->napi, skb);  in ice_receive_skb()
1107 	rx_ring->q_vector->rx.total_pkts += total_rx_pkts;  in ice_clean_rx_irq()
1108 	rx_ring->q_vector->rx.total_bytes += total_rx_bytes;  in ice_clean_rx_irq()
1193 ice_update_itr(struct ice_q_vector *q_vector, struct ice_ring_container *rc)  in ice_update_itr()  argument
1208 	if (q_vector->itr_countdown) {  in ice_update_itr()
1213 	container_is_rx = (&q_vector->rx == rc);  in ice_update_itr()
1229 	prefetch(q_vector->vsi->port_info);  in ice_update_itr()
1241 		    (q_vector->tx.target_itr & ICE_ITR_ADAPTIVE_LATENCY)) {  in ice_update_itr()
1252 		    (q_vector->rx.target_itr & ICE_ITR_MASK) ==  in ice_update_itr()
1280 		itr = min(q_vector->tx.current_itr, q_vector->rx.current_itr);  in ice_update_itr()
1314 	itr = ice_adjust_itr_by_size_and_speed(q_vector->vsi->port_info,  in ice_update_itr()
1362 static void ice_update_ena_itr(struct ice_q_vector *q_vector)  in ice_update_ena_itr()  argument
1364 	struct ice_ring_container *tx = &q_vector->tx;  in ice_update_ena_itr()
1365 	struct ice_ring_container *rx = &q_vector->rx;  in ice_update_ena_itr()
1366 	struct ice_vsi *vsi = q_vector->vsi;  in ice_update_ena_itr()
1373 	if (q_vector->itr_countdown == ICE_IN_WB_ON_ITR_MODE) {  in ice_update_ena_itr()
1375 		wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);  in ice_update_ena_itr()
1382 		q_vector->itr_countdown = 0;  in ice_update_ena_itr()
1387 	ice_update_itr(q_vector, tx);  in ice_update_ena_itr()
1388 	ice_update_itr(q_vector, rx);  in ice_update_ena_itr()
1402 		q_vector->itr_countdown = ITR_COUNTDOWN_START;  in ice_update_ena_itr()
1411 		q_vector->itr_countdown = ITR_COUNTDOWN_START;  in ice_update_ena_itr()
1416 		q_vector->itr_countdown = ITR_COUNTDOWN_START;  in ice_update_ena_itr()
1420 		if (q_vector->itr_countdown)  in ice_update_ena_itr()
1421 			q_vector->itr_countdown--;  in ice_update_ena_itr()
1424 	if (!test_bit(__ICE_DOWN, q_vector->vsi->state))  in ice_update_ena_itr()
1425 		wr32(&q_vector->vsi->back->hw,  in ice_update_ena_itr()
1426 		     GLINT_DYN_CTL(q_vector->reg_idx),  in ice_update_ena_itr()
1444 static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)  in ice_set_wb_on_itr()  argument
1446 	struct ice_vsi *vsi = q_vector->vsi;  in ice_set_wb_on_itr()
1449 	if (q_vector->itr_countdown == ICE_IN_WB_ON_ITR_MODE)  in ice_set_wb_on_itr()
1452 	if (q_vector->num_ring_rx)  in ice_set_wb_on_itr()
1453 		wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),  in ice_set_wb_on_itr()
1457 	if (q_vector->num_ring_tx)  in ice_set_wb_on_itr()
1458 		wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),  in ice_set_wb_on_itr()
1462 	q_vector->itr_countdown = ICE_IN_WB_ON_ITR_MODE;  in ice_set_wb_on_itr()
1476 	struct ice_q_vector *q_vector =  in ice_napi_poll()  local
1486 	ice_for_each_ring(ring, q_vector->tx)  in ice_napi_poll()
1495 	if (unlikely(q_vector->num_ring_rx > 1))  in ice_napi_poll()
1500 		budget_per_ring = max(budget / q_vector->num_ring_rx, 1);  in ice_napi_poll()
1505 	ice_for_each_ring(ring, q_vector->rx) {  in ice_napi_poll()
1523 		ice_update_ena_itr(q_vector);  in ice_napi_poll()
1525 		ice_set_wb_on_itr(q_vector);  in ice_napi_poll()