Lines Matching refs:writeq
1135 writeq(val64, &bar0->tti_data1_mem); in init_tti()
1160 writeq(val64, &bar0->tti_data2_mem); in init_tti()
1165 writeq(val64, &bar0->tti_command_mem); in init_tti()
1210 writeq(val64, &bar0->sw_reset); in init_nic()
1217 writeq(val64, &bar0->sw_reset); in init_nic()
1239 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1241 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1251 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in init_nic()
1272 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1273 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1274 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1275 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1290 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1295 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
1300 writeq(val64, &bar0->tx_fifo_partition_2); in init_nic()
1305 writeq(val64, &bar0->tx_fifo_partition_3); in init_nic()
1320 writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable); in init_nic()
1335 writeq(val64, &bar0->tx_pa_cfg); in init_nic()
1344 writeq(val64, &bar0->rx_queue_priority); in init_nic()
1393 writeq(val64, &bar0->rx_queue_cfg); in init_nic()
1402 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1403 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1404 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1405 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1406 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1410 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1411 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1412 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1413 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1415 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1419 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1421 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1423 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1425 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1427 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1431 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1432 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1433 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1434 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1436 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1440 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1442 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1444 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1446 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1448 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1452 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1454 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1456 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1458 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1460 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1464 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1466 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1468 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1470 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1472 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1476 writeq(val64, &bar0->tx_w_round_robin_0); in init_nic()
1477 writeq(val64, &bar0->tx_w_round_robin_1); in init_nic()
1478 writeq(val64, &bar0->tx_w_round_robin_2); in init_nic()
1479 writeq(val64, &bar0->tx_w_round_robin_3); in init_nic()
1481 writeq(val64, &bar0->tx_w_round_robin_4); in init_nic()
1488 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1497 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1498 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1499 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1500 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1501 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1504 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1508 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1509 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1510 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1511 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1513 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1516 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1520 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1522 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1524 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1526 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1528 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1531 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1535 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1536 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1537 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1538 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1540 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1543 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1547 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1549 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1551 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1553 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1555 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1558 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1562 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1564 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1566 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1568 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1570 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1573 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1577 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1579 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1581 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1583 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1585 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1588 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1592 writeq(val64, &bar0->rx_w_round_robin_0); in init_nic()
1593 writeq(val64, &bar0->rx_w_round_robin_1); in init_nic()
1594 writeq(val64, &bar0->rx_w_round_robin_2); in init_nic()
1595 writeq(val64, &bar0->rx_w_round_robin_3); in init_nic()
1597 writeq(val64, &bar0->rx_w_round_robin_4); in init_nic()
1600 writeq(val64, &bar0->rts_qos_steering); in init_nic()
1607 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1612 writeq(val64, &bar0->rts_frm_len_n[i]); in init_nic()
1625 writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]), in init_nic()
1641 writeq(mac_control->stats_mem_phy, &bar0->stat_addr); in init_nic()
1645 writeq(val64, &bar0->stat_byte_cnt); in init_nic()
1654 writeq(val64, &bar0->mac_link_util); in init_nic()
1680 writeq(val64, &bar0->rti_data1_mem); in init_nic()
1690 writeq(val64, &bar0->rti_data2_mem); in init_nic()
1696 writeq(val64, &bar0->rti_command_mem); in init_nic()
1725 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3); in init_nic()
1726 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7); in init_nic()
1732 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1734 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1743 writeq(val64, &bar0->mac_cfg); in init_nic()
1745 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1747 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1758 writeq(val64, &bar0->rmac_pause_cfg); in init_nic()
1772 writeq(val64, &bar0->mc_pause_thresh_q0q3); in init_nic()
1780 writeq(val64, &bar0->mc_pause_thresh_q4q7); in init_nic()
1788 writeq(val64, &bar0->pic_control); in init_nic()
1791 writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout); in init_nic()
1792 writeq(0x0, &bar0->read_retry_delay); in init_nic()
1793 writeq(0x0, &bar0->write_retry_delay); in init_nic()
1803 writeq(val64, &bar0->misc_control); in init_nic()
1806 writeq(val64, &bar0->pic_control2); in init_nic()
1810 writeq(val64, &bar0->tmac_avg_ipg); in init_nic()
1845 writeq(temp64, addr); in do_s2io_write_bits()
1854 writeq(DISABLE_ALL_INTRS, &bar0->general_int_mask); in en_dis_err_alarms()
2012 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2018 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask); in en_dis_able_nic_intrs()
2030 writeq(0x0, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2036 writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask); in en_dis_able_nic_intrs()
2045 writeq(0x0, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2051 writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask); in en_dis_able_nic_intrs()
2060 writeq(temp64, &bar0->general_int_mask); in en_dis_able_nic_intrs()
2183 writeq(fix_mac[i++], &bar0->gpio_control); in fix_mac_address()
2215 writeq((u64)ring->rx_blocks[0].block_dma_addr, in start_nic()
2227 writeq(val64, &bar0->prc_ctrl_n[i]); in start_nic()
2234 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2240 writeq(val64, &bar0->rx_pa_cfg); in start_nic()
2259 writeq(val64, &bar0->adapter_control); in start_nic()
2284 writeq(val64, &bar0->adapter_control); in start_nic()
2299 writeq(val64, &bar0->gpio_control); in start_nic()
2301 writeq(val64, (void __iomem *)bar0 + 0x2700); in start_nic()
2416 writeq(val64, &bar0->adapter_control); in stop_nic()
2808 writeq(0, &bar0->rx_traffic_mask); in s2io_poll_inta()
2839 writeq(val64, &bar0->rx_traffic_int); in s2io_netpoll()
2840 writeq(val64, &bar0->tx_traffic_int); in s2io_netpoll()
3092 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3094 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3103 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3105 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3112 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3114 writeq(val64, &bar0->mdio_control); in s2io_mdio_write()
3138 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3140 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3148 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3150 writeq(val64, &bar0->mdio_control); in s2io_mdio_read()
3410 writeq(val64, &bar0->sw_reset); in s2io_reset()
3450 writeq(s2BIT(62), &bar0->txpic_int_reg); in s2io_reset()
3487 writeq(val64, &bar0->gpio_control); in s2io_reset()
3489 writeq(val64, (void __iomem *)bar0 + 0x2700); in s2io_reset()
3498 writeq(val64, &bar0->pcc_err_reg); in s2io_reset()
3536 writeq(value[i], &bar0->swapper_ctrl); in s2io_set_swapper()
3554 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3567 writeq((value[i] | valr), &bar0->swapper_ctrl); in s2io_set_swapper()
3568 writeq(valt, &bar0->xmsi_address); in s2io_set_swapper()
3602 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3626 writeq(val64, &bar0->swapper_ctrl); in s2io_set_swapper()
3678 writeq(nic->msix_info[i].addr, &bar0->xmsi_address); in restore_xmsi_data()
3679 writeq(nic->msix_info[i].data, &bar0->xmsi_data); in restore_xmsi_data()
3681 writeq(val64, &bar0->xmsi_access); in restore_xmsi_data()
3701 writeq(val64, &bar0->xmsi_access); in store_xmsi_data()
3770 writeq(rx_mat, &bar0->rx_mat); in s2io_enable_msi_x()
3834 writeq(val64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
3849 writeq(saved64, &bar0->scheduled_int_ctrl); in s2io_test_msi()
4146 writeq(val64, &tx_fifo->TxDL_Pointer); in s2io_xmit()
4153 writeq(val64, &tx_fifo->List_Control); in s2io_xmit()
4240 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4246 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_msix_fifo_handle()
4251 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_msix_fifo_handle()
4275 writeq(val64, &bar0->gpio_int_reg); in s2io_txpic_intr_handle()
4279 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4285 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4287 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4299 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4308 writeq(val64, &bar0->gpio_int_mask); in s2io_txpic_intr_handle()
4313 writeq(val64, &bar0->adapter_control); in s2io_txpic_intr_handle()
4335 writeq(val64, addr); in do_s2io_chk_alarm_bit()
4384 writeq(val64, &bar0->mac_rmac_err_reg); in s2io_handle_errors()
4616 writeq(val64, &bar0->mc_err_reg); in s2io_handle_errors()
4687 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask); in s2io_isr()
4692 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask); in s2io_isr()
4693 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4703 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); in s2io_isr()
4718 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int); in s2io_isr()
4736 writeq(sp->general_int_mask, &bar0->general_int_mask); in s2io_isr()
4762 writeq(val64, &bar0->stat_cfg); in s2io_updt_stats()
4890 writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac), in s2io_set_multicast()
4892 writeq(RMAC_ADDR_DATA1_MEM_MASK(mask), in s2io_set_multicast()
4897 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4907 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr), in s2io_set_multicast()
4909 writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0), in s2io_set_multicast()
4914 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
4930 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4932 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4938 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
4952 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4954 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in s2io_set_multicast()
4960 writeq(val64, &bar0->rx_pa_cfg); in s2io_set_multicast()
4985 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr), in s2io_set_multicast()
4987 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL), in s2io_set_multicast()
4993 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5015 writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr), in s2io_set_multicast()
5017 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL), in s2io_set_multicast()
5023 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_set_multicast()
5115 writeq(RMAC_ADDR_DATA0_MEM_ADDR(addr), in do_s2io_add_mac()
5120 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_add_mac()
5164 writeq(val64, &bar0->rmac_addr_cmd_mem); in do_s2io_read_unicast_mc()
5391 writeq(val64, &bar0->gpio_control); in s2io_set_led()
5399 writeq(val64, &bar0->adapter_control); in s2io_set_led()
5446 writeq(sp->adapt_ctrl_org, &bar0->gpio_control); in s2io_ethtool_set_led()
5532 writeq(val64, &bar0->rmac_pause_cfg); in s2io_ethtool_setpause_data()
5648 writeq(SPI_DATA_WRITE(data, (cnt << 3)), &bar0->spi_data); in write_eeprom()
5878 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
5886 writeq(val64, &bar0->xmsi_data); in s2io_register_test()
6083 writeq(val64, &bar0->adapter_control); in s2io_rldram_test()
6100 writeq(val64, &bar0->mc_rldram_test_d0); in s2io_rldram_test()
6105 writeq(val64, &bar0->mc_rldram_test_d1); in s2io_rldram_test()
6110 writeq(val64, &bar0->mc_rldram_test_d2); in s2io_rldram_test()
6113 writeq(val64, &bar0->mc_rldram_test_add); in s2io_rldram_test()
6652 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in s2io_change_mtu()
6698 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6703 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6707 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6719 writeq(val64, &bar0->adapter_control); in s2io_set_link()
6726 writeq(val64, &bar0->gpio_control); in s2io_set_link()
6732 writeq(val64, &bar0->adapter_control); in s2io_set_link()
7606 writeq(val64, &bar0->rts_ds_mem_data); in rts_ds_steer()
7612 writeq(val64, &bar0->rts_ds_mem_ctrl); in rts_ds_steer()
7939 writeq(val64, &bar0->rmac_addr_cmd_mem); in s2io_init_nic()
8007 writeq(val64, &bar0->gpio_control); in s2io_init_nic()
8009 writeq(val64, (void __iomem *)bar0 + 0x2700); in s2io_init_nic()